machinst x64: implement cmov
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@@ -988,16 +988,7 @@ pub(crate) fn lower_icmp_or_ifcmp_to_flags<C: LowerCtx<I = Inst>>(
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(false, true) => NarrowValueMode::SignExtend64,
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(false, false) => NarrowValueMode::ZeroExtend64,
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};
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let inputs = [
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InsnInput {
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insn: insn,
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input: 0,
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},
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InsnInput {
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insn: insn,
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input: 1,
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},
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];
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let inputs = [InsnInput { insn, input: 0 }, InsnInput { insn, input: 1 }];
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let ty = ctx.input_ty(insn, 0);
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let rn = put_input_in_reg(ctx, inputs[0], narrow_mode);
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let rm = put_input_in_rse_imm12(ctx, inputs[1], narrow_mode);
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@@ -1010,16 +1001,7 @@ pub(crate) fn lower_icmp_or_ifcmp_to_flags<C: LowerCtx<I = Inst>>(
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pub(crate) fn lower_fcmp_or_ffcmp_to_flags<C: LowerCtx<I = Inst>>(ctx: &mut C, insn: IRInst) {
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let ty = ctx.input_ty(insn, 0);
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let bits = ty_bits(ty);
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let inputs = [
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InsnInput {
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insn: insn,
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input: 0,
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},
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InsnInput {
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insn: insn,
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input: 1,
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},
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];
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let inputs = [InsnInput { insn, input: 0 }, InsnInput { insn, input: 1 }];
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let rn = put_input_in_reg(ctx, inputs[0], NarrowValueMode::None);
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let rm = put_input_in_reg(ctx, inputs[1], NarrowValueMode::None);
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match bits {
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