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Fix master tests (#1316)

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Co-authored-by: Benjamin Bouvier <public@benj.me>
This commit is contained in:
bjorn3
2020-01-06 14:39:04 +01:00
committed by Benjamin Bouvier
parent 9fcd561220
commit 9bbe378d41
2 changed files with 9 additions and 9 deletions
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2
cranelift/filetests/filetests/isa/x86/relax_branch.clif
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@@ -104,7 +104,7 @@ function u0:2691(i32 [%rdi], i32 [%rsi], i64 vmctx [%r14]) -> i64 uext [%rax] ba
@0098 [DynRexOp1icscc#39,%rbx] v76 = icmp.i32 eq v47, v75 @0098 [DynRexOp1icscc#39,%rbx] v76 = icmp.i32 eq v47, v75
@0098 [Op2urm_noflags_abcd#4b6,%rbx] v77 = bint.i32 v76 @0098 [Op2urm_noflags_abcd#4b6,%rbx] v77 = bint.i32 v76
@0099 [DynRexOp1rr#21,%r10] v78 = band.i32 v50, v77 @0099 [DynRexOp1rr#21,%r10] v78 = band.i32 v50, v77
@009a [DynRexOp1tjccb#74] brz v78, ebb9 @009a [RexOp1tjccb#74] brz v78, ebb9
@009a [-] fallthrough ebb12 @009a [-] fallthrough ebb12
ebb12: ebb12:

16
cranelift/filetests/filetests/regalloc/coloring-227.clif
View File

@@ -8,7 +8,7 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
ebb0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i64): ebb0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i64):
[RexOp1pu_id#b8] v5 = iconst.i32 0 [RexOp1pu_id#b8] v5 = iconst.i32 0
[RexOp1pu_id#b8] v6 = iconst.i32 0 [RexOp1pu_id#b8] v6 = iconst.i32 0
[DynRexOp1tjccb#74] brz v6, ebb10 [RexOp1tjccb#74] brz v6, ebb10
[Op1jmpb#eb] jump ebb3(v5, v5, v5, v5, v5, v5, v0, v1, v2, v3) [Op1jmpb#eb] jump ebb3(v5, v5, v5, v5, v5, v5, v0, v1, v2, v3)
ebb3(v15: i32, v17: i32, v25: i32, v31: i32, v40: i32, v47: i32, v54: i32, v61: i32, v68: i32, v75: i32): ebb3(v15: i32, v17: i32, v25: i32, v31: i32, v40: i32, v47: i32, v54: i32, v61: i32, v68: i32, v75: i32):
@@ -16,7 +16,7 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
ebb6: ebb6:
[RexOp1pu_id#b8] v8 = iconst.i32 0 [RexOp1pu_id#b8] v8 = iconst.i32 0
[DynRexOp1tjccb#75] brnz v8, ebb5 [RexOp1tjccb#75] brnz v8, ebb5
[Op1jmpb#eb] jump ebb20 [Op1jmpb#eb] jump ebb20
ebb20: ebb20:
@@ -25,16 +25,16 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
[DynRexOp1icscc#39] v12 = icmp.i32 eq v15, v11 [DynRexOp1icscc#39] v12 = icmp.i32 eq v15, v11
[RexOp2urm_noflags#4b6] v13 = bint.i32 v12 [RexOp2urm_noflags#4b6] v13 = bint.i32 v12
[DynRexOp1rr#21] v14 = band v9, v13 [DynRexOp1rr#21] v14 = band v9, v13
[DynRexOp1tjccb#75] brnz v14, ebb6 [RexOp1tjccb#75] brnz v14, ebb6
[Op1jmpb#eb] jump ebb7 [Op1jmpb#eb] jump ebb7
ebb7: ebb7:
[DynRexOp1tjccb#74] brz.i32 v17, ebb8 [RexOp1tjccb#74] brz.i32 v17, ebb8
[Op1jmpb#eb] jump ebb17 [Op1jmpb#eb] jump ebb17
ebb17: ebb17:
[RexOp1pu_id#b8] v18 = iconst.i32 0 [RexOp1pu_id#b8] v18 = iconst.i32 0
[DynRexOp1tjccb#74] brz v18, ebb9 [RexOp1tjccb#74] brz v18, ebb9
[Op1jmpb#eb] jump ebb16 [Op1jmpb#eb] jump ebb16
ebb16: ebb16:
@@ -53,7 +53,7 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
[RexOp1pu_id#b8] v27 = iconst.i32 3 [RexOp1pu_id#b8] v27 = iconst.i32 3
[RexOp1pu_id#b8] v28 = iconst.i32 4 [RexOp1pu_id#b8] v28 = iconst.i32 4
[DynRexOp1rr#09] v35 = bor.i32 v31, v13 [DynRexOp1rr#09] v35 = bor.i32 v31, v13
[DynRexOp1tjccb#75] brnz v35, ebb15(v27) [RexOp1tjccb#75] brnz v35, ebb15(v27)
[Op1jmpb#eb] jump ebb15(v28) [Op1jmpb#eb] jump ebb15(v28)
ebb15(v36: i32): ebb15(v36: i32):
@@ -71,12 +71,12 @@ function %pr227(i32 [%rdi], i32 [%rsi], i32 [%rdx], i32 [%rcx], i64 vmctx [%r8])
ebb2(v7: i32, v45: i32, v52: i32, v59: i32, v66: i32, v73: i32): ebb2(v7: i32, v45: i32, v52: i32, v59: i32, v66: i32, v73: i32):
[RexOp1pu_id#b8] v44 = iconst.i32 0 [RexOp1pu_id#b8] v44 = iconst.i32 0
[DynRexOp1tjccb#74] brz v44, ebb12 [RexOp1tjccb#74] brz v44, ebb12
[Op1jmpb#eb] jump ebb18 [Op1jmpb#eb] jump ebb18
ebb18: ebb18:
[RexOp1pu_id#b8] v50 = iconst.i32 11 [RexOp1pu_id#b8] v50 = iconst.i32 11
[DynRexOp1tjccb#74] brz v50, ebb14 [RexOp1tjccb#74] brz v50, ebb14
[Op1jmpb#eb] jump ebb19 [Op1jmpb#eb] jump ebb19
ebb19: ebb19: