Add x86-specific instruction for i64x2 multiplication

Without this special instruction, legalizing to the AVX512 instruction AND the SSE instruction sequence is impossible. This extra instruction would be rendered unnecessary by the x64 backend.
2020-05-20 16:17:16 -07:00
parent 8701645493
commit 9ba9fd0f64
6 changed files with 35 additions and 3 deletions
--- a/cranelift/codegen/src/isa/aarch64/lower_inst.rs
+++ b/cranelift/codegen/src/isa/aarch64/lower_inst.rs
@@ -1911,6 +1911,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
        | Opcode::X86Pmaxu
        | Opcode::X86Pmins
        | Opcode::X86Pminu
+        | Opcode::X86Pmullq
        | Opcode::X86Packss
        | Opcode::X86Punpckh
        | Opcode::X86Punpckl