Remove the widening_pairwise_dot_product_s clif instruction (#5889)

This was added for the wasm SIMD proposal but I've been poking around at
this recently and the instruction can instead be represented by its
component parts with the same semantics I believe. This commit removes
the instruction and instead represents it with the existing
`iadd_pairwise` instruction (among others) and updates backends to with
new pattern matches to have the same codegen as before.

This interestingly entirely removed the codegen rule with no replacement
on the AArch64 backend as the existing rules all existed to produce the
same codegen.
This commit is contained in:
Alex Crichton
2023-02-27 12:43:43 -06:00
committed by GitHub
parent 6cf7155052
commit 9b86a0b9b1
8 changed files with 46 additions and 88 deletions

View File

@@ -3134,41 +3134,6 @@ pub(crate) fn define(
.operands_out(vec![a]),
);
let I16x8 = &TypeVar::new(
"I16x8",
"A SIMD vector type containing 8 integer lanes each 16 bits wide.",
TypeSetBuilder::new()
.ints(16..16)
.simd_lanes(8..8)
.includes_scalars(false)
.build(),
);
let x = &Operand::new("x", I16x8);
let y = &Operand::new("y", I16x8);
let a = &Operand::new("a", &I16x8.merge_lanes());
ig.push(
Inst::new(
"widening_pairwise_dot_product_s",
r#"
Takes corresponding elements in `x` and `y`, performs a sign-extending length-doubling
multiplication on them, then adds adjacent pairs of elements to form the result. For
example, if the input vectors are `[x3, x2, x1, x0]` and `[y3, y2, y1, y0]`, it produces
the vector `[r1, r0]`, where `r1 = sx(x3) * sx(y3) + sx(x2) * sx(y2)` and
`r0 = sx(x1) * sx(y1) + sx(x0) * sx(y0)`, and `sx(n)` sign-extends `n` to twice its width.
This will double the lane width and halve the number of lanes. So the resulting
vector has the same number of bits as `x` and `y` do (individually).
See <https://github.com/WebAssembly/simd/pull/127> for background info.
"#,
&formats.binary,
)
.operands_in(vec![x, y])
.operands_out(vec![a]),
);
let IntTo = &TypeVar::new(
"IntTo",
"A larger integer type with the same number of lanes",