Merge branch 'master' into master

lib/codegen/src/ir/dfg.rs

@@ -165,19 +165,18 @@ fn valid_valuedata(data: &ValueData) -> bool {
             return false;
         }
     }
-    return true;
+    true
 }
 
 impl<'a> Iterator for Values<'a> {
     type Item = Value;
 
     fn next(&mut self) -> Option<Self::Item> {
-        return self
-            .inner
+        self.inner
             .by_ref()
             .filter(|kv| valid_valuedata(kv.1))
             .next()
-            .map(|kv| kv.0);
+            .map(|kv| kv.0)
     }
 }
 

lib/codegen/src/isa/riscv/enc_tables.rs

@@ -6,7 +6,6 @@ use isa;
 use isa::constraints::*;
 use isa::enc_tables::*;
 use isa::encoding::RecipeSizing;
-use predicates;
 
 // Include the generated encoding tables:
 // - `LEVEL1_RV32`

lib/codegen/src/isa/x86/enc_tables.rs

@@ -10,7 +10,6 @@ use isa;
 use isa::constraints::*;
 use isa::enc_tables::*;
 use isa::encoding::RecipeSizing;
-use predicates;
 
 include!(concat!(env!("OUT_DIR"), "/encoding-x86.rs"));
 include!(concat!(env!("OUT_DIR"), "/legalize-x86.rs"));