AArch64: port load and store operations to ISLE. (#4785)
This retains `lower_amode` in the handwritten code (@akirilov-arm reports that there is an upcoming patch to port this), but tweaks it slightly to take a `Value` rather than an `Inst`.
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@@ -9,8 +9,8 @@ use target_lexicon::Triple;
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pub use super::MachLabel;
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pub use crate::data_value::DataValue;
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pub use crate::ir::{
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ArgumentExtension, Constant, DynamicStackSlot, ExternalName, FuncRef, GlobalValue, Immediate,
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SigRef, StackSlot,
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dynamic_to_fixed, ArgumentExtension, Constant, DynamicStackSlot, ExternalName, FuncRef,
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GlobalValue, Immediate, SigRef, StackSlot,
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};
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pub use crate::isa::unwind::UnwindInst;
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pub use crate::machinst::{
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@@ -397,6 +397,15 @@ macro_rules! isle_prelude_methods {
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}
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}
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#[inline]
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fn ty_vec64_ctor(&mut self, ty: Type) -> Option<Type> {
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if ty.is_vector() && ty.bits() == 64 {
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Some(ty)
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} else {
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None
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}
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}
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#[inline]
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fn ty_vec64(&mut self, ty: Type) -> Option<Type> {
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if ty.is_vector() && ty.bits() == 64 {
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@@ -415,6 +424,24 @@ macro_rules! isle_prelude_methods {
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}
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}
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#[inline]
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fn ty_dyn_vec64(&mut self, ty: Type) -> Option<Type> {
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if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 64 {
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Some(ty)
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} else {
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None
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}
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}
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#[inline]
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fn ty_dyn_vec128(&mut self, ty: Type) -> Option<Type> {
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if ty.is_dynamic_vector() && dynamic_to_fixed(ty).bits() == 128 {
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Some(ty)
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} else {
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None
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}
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}
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#[inline]
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fn ty_vec64_int(&mut self, ty: Type) -> Option<Type> {
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if ty.is_vector() && ty.bits() == 64 && ty.lane_type().is_int() {
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