T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

AArch64: port load and store operations to ISLE. (#4785)

Browse Source 
This retains `lower_amode` in the handwritten code (@akirilov-arm
reports that there is an upcoming patch to port this), but tweaks it
slightly to take a `Value` rather than an `Inst`.
This commit is contained in:
Chris Fallin
2022-08-29 17:45:55 -07:00
committed by GitHub
parent 5d05d7676f
commit 955d4e4ba1
15 changed files with 442 additions and 296 deletions
Download Patch File Download Diff File Expand all files Collapse all files

172
cranelift/codegen/src/isa/aarch64/lower.isle
View File

@@ -1777,10 +1777,10 @@
(rule (lower (has_type ty (splat (ireduce (iconst (u64_from_imm64 n))))))
(splat_const n (vector_size ty)))
(rule (lower (has_type ty (splat x @ (load flags _addr offset))))
(rule (lower (has_type ty (splat x @ (load flags addr offset))))
(if-let mem_op (is_sinkable_inst x))
(let ((_ Unit (sink_inst mem_op))
(addr AMode (amode (lane_type ty) mem_op offset))
(addr AMode (amode (lane_type ty) addr offset))
(address Reg (load_addr addr)))
(ld1r address (vector_size ty) flags)))
@@ -2031,6 +2031,174 @@
(rule (lower (return args))
(lower_return (range 0 (value_slice_len args)) args))
;;;; Rules for loads ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower
(has_type $I8 (load flags address offset)))
(aarch64_uload8 (amode $I8 address offset) flags))
(rule (lower
(has_type $I16 (load flags address offset)))
(aarch64_uload16 (amode $I16 address offset) flags))
(rule (lower
(has_type $I32 (load flags address offset)))
(aarch64_uload32 (amode $I32 address offset) flags))
(rule (lower
(has_type $I64 (load flags address offset)))
(aarch64_uload64 (amode $I64 address offset) flags))
(rule (lower
(has_type $R64 (load flags address offset)))
(aarch64_uload64 (amode $I64 address offset) flags))
(rule (lower
(has_type $F32 (load flags address offset)))
(aarch64_fpuload32 (amode $F32 address offset) flags))
(rule (lower
(has_type $F64 (load flags address offset)))
(aarch64_fpuload64 (amode $F64 address offset) flags))
(rule (lower
(has_type $I128 (load flags address offset)))
(aarch64_loadp64 (pair_amode address offset) flags))
(rule (lower
(has_type (ty_vec64 _)
(load flags address offset)))
(aarch64_fpuload128 (amode $F64 address offset) flags))
(rule (lower
(has_type (ty_vec128 _)
(load flags address offset)))
(aarch64_fpuload128 (amode $I8X16 address offset) flags))
(rule (lower
(has_type (ty_dyn_vec64 _)
(load flags address offset)))
(aarch64_fpuload64 (amode $F64 address offset) flags))
(rule (lower
(has_type (ty_dyn_vec128 _)
(load flags address offset)))
(aarch64_fpuload128 (amode $I8X16 address offset) flags))
(rule (lower
(uload8 flags address offset))
(aarch64_uload8 (amode $I8 address offset) flags))
(rule (lower
(sload8 flags address offset))
(aarch64_sload8 (amode $I8 address offset) flags))
(rule (lower
(uload16 flags address offset))
(aarch64_uload16 (amode $I16 address offset) flags))
(rule (lower
(sload16 flags address offset))
(aarch64_sload16 (amode $I16 address offset) flags))
(rule (lower
(uload32 flags address offset))
(aarch64_uload32 (amode $I32 address offset) flags))
(rule (lower
(sload32 flags address offset))
(aarch64_sload32 (amode $I32 address offset) flags))
(rule (lower
(sload8x8 flags address offset))
(vec_extend (VecExtendOp.Sxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size16)))
(rule (lower
(uload8x8 flags address offset))
(vec_extend (VecExtendOp.Uxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size16)))
(rule (lower
(sload16x4 flags address offset))
(vec_extend (VecExtendOp.Sxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size32)))
(rule (lower
(uload16x4 flags address offset))
(vec_extend (VecExtendOp.Uxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size32)))
(rule (lower
(sload32x2 flags address offset))
(vec_extend (VecExtendOp.Sxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size64)))
(rule (lower
(uload32x2 flags address offset))
(vec_extend (VecExtendOp.Uxtl)
(aarch64_fpuload64 (amode $F64 address offset) flags)
$false
(ScalarSize.Size64)))
;;;; Rules for stores ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower
(store flags value @ (value_type $I8) address offset))
(side_effect
(aarch64_store8 (amode $I8 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $I16) address offset))
(side_effect
(aarch64_store16 (amode $I16 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $I32) address offset))
(side_effect
(aarch64_store32 (amode $I32 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $I64) address offset))
(side_effect
(aarch64_store64 (amode $I64 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $R64) address offset))
(side_effect
(aarch64_store64 (amode $I64 address offset) flags value)))
(rule (lower
(istore8 flags value address offset))
(side_effect
(aarch64_store8 (amode $I8 address offset) flags value)))
(rule (lower
(istore16 flags value address offset))
(side_effect
(aarch64_store16 (amode $I16 address offset) flags value)))
(rule (lower
(istore32 flags value address offset))
(side_effect
(aarch64_store32 (amode $I32 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $F32) address offset))
(side_effect
(aarch64_fpustore32 (amode $F32 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $F64) address offset))
(side_effect
(aarch64_fpustore64 (amode $F64 address offset) flags value)))
(rule (lower
(store flags value @ (value_type $I128) address offset))
(side_effect
(aarch64_storep64 (pair_amode address offset) flags
(value_regs_get value 0)
(value_regs_get value 1))))
(rule (lower
(store flags value @ (value_type (ty_vec64 _)) address offset))
(side_effect
(aarch64_fpustore64 (amode $F64 address offset) flags value)))
(rule (lower
(store flags value @ (value_type (ty_vec128 _)) address offset))
(side_effect
(aarch64_fpustore128 (amode $I8X16 address offset) flags value)))
(rule (lower
(store flags value @ (value_type (ty_dyn_vec64 _)) address offset))
(side_effect
(aarch64_fpustore64 (amode $F64 address offset) flags value)))
(rule (lower
(store flags value @ (value_type (ty_dyn_vec128 _)) address offset))
(side_effect
(aarch64_fpustore128 (amode $I8X16 address offset) flags value)))
;;; Rules for `{get,set}_pinned_reg` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (get_pinned_reg))