winch: Use cranelift-codegen x64 backend for emission. (#5581)

This change substitutes the string based emission mechanism with
cranelift-codegen's x64 backend.

This change _does not_:

* Introduce new functionality in terms of supported instructions.
* Change the semantics of the assembler/macroassembler in terms of the logic to
emit instructions.

The most notable differences between this change and the previous version are:

* Handling of shared flags and ISA-specific flags, which for now are left with
the default value.
* Simplification of instruction emission per operand size: previously the
assembler defined different methods depending on the operand size (e.g. `mov`
for 64 bits, and `movl` for 32 bits). This change updates such approach so that
each assembler method takes an operand size as a parameter, reducing duplication
and making the code more concise and easier to integrate with the x64's `Inst` enum.
* Introduction of a disassembler for testing purposes.

As of this change, Winch generates the following code for the following test
programs:

```wat
(module
  (export "main" (func $main))

  (func $main (result i32)
        (i32.const 10)
        (i32.const 20)
        i32.add
        ))
```

```asm
   0:	55                   	push	rbp
   1:	48 89 e5             	mov	rbp, rsp
   4:	b8 0a 00 00 00       	mov	eax, 0xa
   9:	83 c0 14             	add	eax, 0x14
   c:	5d                   	pop	rbp
   d:	c3                   	ret
```

```wat
(module
  (export "main" (func $main))

  (func $main (result i32)
        (local $foo i32)
    (local $bar i32)
        (i32.const 10)
    (local.set $foo)
        (i32.const 20)
    (local.set $bar)

        (local.get $foo)
        (local.get $bar)
        i32.add
        ))
```

```asm
   0:	55                   	push	rbp
   1:	48 89 e5             	mov	rbp, rsp
   4:	48 83 ec 08          	sub	rsp, 8
   8:	48 c7 04 24 00 00 00 00	mov	qword ptr [rsp], 0
  10:	b8 0a 00 00 00       	mov	eax, 0xa
  15:	89 44 24 04          	mov	dword ptr [rsp + 4], eax
  19:	b8 14 00 00 00       	mov	eax, 0x14
  1e:	89 04 24             	mov	dword ptr [rsp], eax
  21:	8b 04 24             	mov	eax, dword ptr [rsp]
  24:	8b 4c 24 04          	mov	ecx, dword ptr [rsp + 4]
  28:	01 c1                	add	ecx, eax
  2a:	48 89 c8             	mov	rax, rcx
  2d:	48 83 c4 08          	add	rsp, 8
  31:	5d                   	pop	rbp
  32:	c3                   	ret
```

```wat
(module
  (export "main" (func $main))

  (func $main (param i32) (param i32) (result i32)
        (local.get 0)
        (local.get 1)
        i32.add
        ))
```

```asm
   0:	55                   	push	rbp
   1:	48 89 e5             	mov	rbp, rsp
   4:	48 83 ec 08          	sub	rsp, 8
   8:	89 7c 24 04          	mov	dword ptr [rsp + 4], edi
   c:	89 34 24             	mov	dword ptr [rsp], esi
   f:	8b 04 24             	mov	eax, dword ptr [rsp]
  12:	8b 4c 24 04          	mov	ecx, dword ptr [rsp + 4]
  16:	01 c1                	add	ecx, eax
  18:	48 89 c8             	mov	rax, rcx
  1b:	48 83 c4 08          	add	rsp, 8
  1f:	5d                   	pop	rbp
  20:	c3                   	ret
```

winch/src/disasm.rs

@@ -0,0 +1,61 @@
+//! Disassembly utilities.
+
+use anyhow::{bail, Result};
+use capstone::prelude::*;
+use std::fmt::Write;
+use target_lexicon::Architecture;
+use winch_codegen::TargetIsa;
+
+/// Disassemble and print a machine code buffer.
+pub fn print(bytes: &[u8], isa: &dyn TargetIsa) -> Result<()> {
+    let dis = disassembler_for(isa)?;
+    let insts = dis.disasm_all(bytes, 0x0).unwrap();
+
+    for i in insts.iter() {
+        let mut line = String::new();
+
+        write!(&mut line, "{:4x}:\t", i.address()).unwrap();
+
+        let mut bytes_str = String::new();
+        let mut len = 0;
+        let mut first = true;
+        for b in i.bytes() {
+            if !first {
+                write!(&mut bytes_str, " ").unwrap();
+            }
+            write!(&mut bytes_str, "{:02x}", b).unwrap();
+            len += 1;
+            first = false;
+        }
+        write!(&mut line, "{:21}\t", bytes_str).unwrap();
+        if len > 8 {
+            write!(&mut line, "\n\t\t\t\t").unwrap();
+        }
+
+        if let Some(s) = i.mnemonic() {
+            write!(&mut line, "{}\t", s).unwrap();
+        }
+
+        if let Some(s) = i.op_str() {
+            write!(&mut line, "{}", s).unwrap();
+        }
+
+        println!("{}", line);
+    }
+
+    Ok(())
+}
+
+fn disassembler_for(isa: &dyn TargetIsa) -> Result<Capstone> {
+    let disasm = match isa.triple().architecture {
+        Architecture::X86_64 => Capstone::new()
+            .x86()
+            .mode(arch::x86::ArchMode::Mode64)
+            .build()
+            .map_err(|e| anyhow::format_err!("{}", e))?,
+
+        _ => bail!("Unsupported ISA"),
+    };
+
+    Ok(disasm)
+}

winch/src/main.rs

@@ -5,13 +5,16 @@
 
 use anyhow::{Context, Result};
 use clap::Parser;
+use cranelift_codegen::settings;
 use std::{fs, path::PathBuf, str::FromStr};
 use target_lexicon::Triple;
 use wasmtime_environ::{
     wasmparser::{types::Types, Parser as WasmParser, Validator},
     DefinedFuncIndex, FunctionBodyData, Module, ModuleEnvironment, Tunables,
 };
-use winch_codegen::isa::{self, TargetIsa};
+use winch_codegen::{lookup, TargetIsa};
+
+mod disasm;
 
 #[derive(Parser, Debug)]
 struct Options {
@@ -29,7 +32,9 @@ fn main() -> Result<()> {
         .with_context(|| format!("Failed to read input file {}", opt.input.display()))?;
     let bytes = wat::parse_bytes(&bytes)?;
     let triple = Triple::from_str(&opt.target)?;
-    let isa = isa::lookup(triple)?;
+    let shared_flags = settings::Flags::new(settings::builder());
+    let isa_builder = lookup(triple)?;
+    let isa = isa_builder.build(shared_flags)?;
     let mut validator = Validator::new();
     let parser = WasmParser::new(0);
     let mut types = Default::default();
@@ -65,9 +70,8 @@ fn compile(
     let buffer = isa
         .compile_function(&sig, &body, validator)
         .expect("Couldn't compile function");
-    for i in buffer {
-        println!("{}", i);
-    }
+
+    disasm::print(buffer.data(), isa)?;
 
     Ok(())
 }