riscv64: remove valueregs_2_reg extractor. (#5426)

This extractor had a side-effect of invoking `put_in_regs`, which is not
supposed to be invoked until the pattern-matching commits to evaluating
a rule right-hand side (i.e., cannot backtrack). In this case the
side-effect was mostly benign (in theory it could have caused additional
values to be computed needlessly), but in general we should be careful
to keep side-effects out of the left-hand side to enable further
optimizations and work on islec.

The implicit conversion from `Value` to `Reg` turns out to be enough to
make the rules in question work, so we can simply remove the use of the
extractor in this case.

cranelift/codegen/src/isa/riscv64/inst.isle

@@ -1366,11 +1366,6 @@
   (load_imm12 x)
   (alu_rr_imm12 (AluOPRRI.Addi) (zero_reg) (imm12_const x)))
 
-;; Let me always get low part of ValueRegs.
-;; Sometimes I only need lowest bits, like `I8 << I128`.
-(decl valueregs_2_reg (Reg) Value)
-(extern extractor infallible valueregs_2_reg valueregs_2_reg)
-
 (decl lower_cls_i128 (ValueRegs) ValueRegs)
 (rule
   (lower_cls_i128 x)