Fix iconst.i8 0 miscompilation
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@@ -549,10 +549,13 @@ fn define_moves(e: &mut PerCpuModeEncodings, shared_defs: &SharedDefinitions, r:
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}
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}
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e.enc64(bconst.bind(B64), rec_pu_id_bool.opcodes(&MOV_IMM).rex());
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e.enc64(bconst.bind(B64), rec_pu_id_bool.opcodes(&MOV_IMM).rex());
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// You may expect that i8 encodings would use 0x30 (XORB) to indicate that encodings should be
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// on 8-bit operands (f.ex "xor %al, %al"). Cranelift currently does not know when it can
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// safely drop the 0x66 prefix, so we explicitly select a wider but permissible opcode.
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let is_zero_int = InstructionPredicate::new_is_zero_int(&formats.unary_imm, "imm");
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let is_zero_int = InstructionPredicate::new_is_zero_int(&formats.unary_imm, "imm");
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e.enc_both_instp(
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e.enc_both_instp(
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iconst.bind(I8),
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iconst.bind(I8),
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rec_u_id_z.opcodes(&XORB),
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rec_u_id_z.opcodes(&XOR),
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is_zero_int.clone(),
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is_zero_int.clone(),
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);
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);
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@@ -711,9 +711,6 @@ pub static XOR_IMM8_SIGN_EXTEND: [u8; 1] = [0x83];
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/// r/m{16,32,64} XOR register of the same size.
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/// r/m{16,32,64} XOR register of the same size.
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pub static XOR: [u8; 1] = [0x31];
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pub static XOR: [u8; 1] = [0x31];
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/// r/m8 XOR r8.
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pub static XORB: [u8; 1] = [0x30];
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/// Bitwise logical XOR of packed double-precision floating-point values.
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/// Bitwise logical XOR of packed double-precision floating-point values.
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pub static XORPD: [u8; 3] = [0x66, 0x0f, 0x57];
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pub static XORPD: [u8; 3] = [0x66, 0x0f, 0x57];
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@@ -44,9 +44,9 @@ block0:
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function %zero_byte() -> i8 fast {
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function %zero_byte() -> i8 fast {
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block0:
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block0:
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; asm: xor %al, %al
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; asm: xor %eax, %eax
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[-,%rax] v0 = iconst.i8 0 ; bin: 30 c0
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[-,%rax] v0 = iconst.i8 0 ; bin: 31 c0
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; asm: xor %dh, %dh
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; asm: xor %edi, %edi
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[-,%rdi] v1 = iconst.i8 0 ; bin: 30 ff
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[-,%rdi] v1 = iconst.i8 0 ; bin: 31 ff
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return v0
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return v0
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}
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}
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@@ -62,11 +62,11 @@ block0:
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function %zero_byte() -> i8 fast {
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function %zero_byte() -> i8 fast {
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block0:
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block0:
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; asm: xor %r8b, %r8b
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; asm: xor %r8d, %r8d
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[-,%r15] v0 = iconst.i8 0 ; bin: 45 30 ff
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[-,%r15] v0 = iconst.i8 0 ; bin: 45 31 ff
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; asm: xor %al, %al
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; asm: xor %eax, eax
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[-,%rax] v1 = iconst.i8 0 ; bin: 30 c0
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[-,%rax] v1 = iconst.i8 0 ; bin: 31 c0
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; asm: xor %dh, %dh
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; asm: xor %edi, %edi
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[-,%rdi] v2 = iconst.i8 0 ; bin: 30 ff
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[-,%rdi] v2 = iconst.i8 0 ; bin: 31 ff
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return v0
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return v0
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}
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}
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