Add a regmove instruction.

This will be used to locally change the register locations of values in
order to satisfy instruction constraints.

lib/cretonne/meta/base/formats.py

@@ -9,7 +9,7 @@ from __future__ import absolute_import
 from cdsl.formats import InstructionFormat
 from cdsl.operands import VALUE, VARIABLE_ARGS
 from .immediates import imm64, uimm8, ieee32, ieee64, offset32, uoffset32
-from .immediates import intcc, floatcc, memflags
+from .immediates import intcc, floatcc, memflags, regunit
 from .entities import ebb, sig_ref, func_ref, jump_table, stack_slot
 
 Nullary = InstructionFormat()
@@ -57,5 +57,7 @@ StackStore = InstructionFormat(VALUE, stack_slot, offset32)
 HeapLoad = InstructionFormat(VALUE, uoffset32)
 HeapStore = InstructionFormat(VALUE, VALUE, uoffset32)
 
+RegMove = InstructionFormat(VALUE, ('src', regunit), ('dst', regunit))
+
 # Finally extract the names of global variables in this module.
 InstructionFormat.extract_names(globals())

lib/cretonne/meta/base/immediates.py

@@ -96,3 +96,9 @@ memflags = ImmediateKind(
         'memflags',
         'Memory operation flags',
         default_member='flags', rust_type='MemFlags')
+
+#: A register unit in the current target ISA.
+regunit = ImmediateKind(
+        'regunit',
+        'A register unit in the target ISA',
+        rust_type='RegUnit')

lib/cretonne/meta/base/instructions.py

@@ -10,7 +10,7 @@ from cdsl.typevar import TypeVar
 from cdsl.instructions import Instruction, InstructionGroup
 from base.types import i8, f32, f64, b1
 from base.immediates import imm64, uimm8, ieee32, ieee64, offset32, uoffset32
-from base.immediates import intcc, floatcc, memflags
+from base.immediates import intcc, floatcc, memflags, regunit
 from base import entities
 import base.formats  # noqa
 
@@ -467,6 +467,23 @@ fill = Instruction(
         """,
         ins=x, outs=a)
 
+src = Operand('src', regunit)
+dst = Operand('dst', regunit)
+
+regmove = Instruction(
+        'regmove', r"""
+        Temporarily divert ``x`` from ``src`` to ``dst``.
+
+        This instruction moves the location of a value from one register to
+        another without creating a new SSA value. It is used by the register
+        allocator to temporarily rearrange register assignments in order to
+        satisfy instruction constraints.
+
+        The register diversions created by this instruction must be undone
+        before the value leaves the EBB. At the entry to a new EBB, all live
+        values must be in their originally assigned registers.
+        """,
+        ins=(x, src, dst))
 
 #
 # Vector operations