wasmtime: Implement table.get and table.set
These instructions have fast, inline JIT paths for the common cases, and only
call out to host VM functions for the slow paths. This required some changes to
`cranelift-wasm`'s `FuncEnvironment`: instead of taking a `FuncCursor` to insert
an instruction sequence within the current basic block,
`FuncEnvironment::translate_table_{get,set}` now take a `&mut FunctionBuilder`
so that they can create whole new basic blocks. This is necessary for
implementing GC read/write barriers that involve branching (e.g. checking for
null, or whether a store buffer is at capacity).
Furthermore, it required that the `load`, `load_complex`, and `store`
instructions handle loading and storing through an `r{32,64}` rather than just
`i{32,64}` addresses. This involved making `r{32,64}` types acceptable
instantiations of the `iAddr` type variable, plus a few new instruction
encodings.
Part of #929
This commit is contained in:
@@ -231,6 +231,32 @@ impl PerCpuModeEncodings {
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});
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}
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/// Add encodings for `inst.r32` to X86_32.
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/// Add encodings for `inst.r32` to X86_64 with and without REX.
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/// Add encodings for `inst.r64` to X86_64 with a REX.W prefix.
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fn enc_r32_r64_instp(
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&mut self,
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inst: &Instruction,
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template: Template,
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instp: InstructionPredicateNode,
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) {
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self.enc32_func(inst.bind(R32), template.nonrex(), |builder| {
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builder.inst_predicate(instp.clone())
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});
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// REX-less encoding must come after REX encoding so we don't use it by default. Otherwise
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// reg-alloc would never use r8 and up.
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self.enc64_func(inst.bind(R32), template.rex(), |builder| {
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builder.inst_predicate(instp.clone())
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});
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self.enc64_func(inst.bind(R32), template.nonrex(), |builder| {
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builder.inst_predicate(instp.clone())
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});
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self.enc64_func(inst.bind(R64), template.rex().w(), |builder| {
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builder.inst_predicate(instp)
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});
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}
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/// Add encodings for `inst.r32` to X86_32.
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/// Add encodings for `inst.r64` to X86_64 with a REX.W prefix.
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fn enc_r32_r64_rex_only(&mut self, inst: impl Into<InstSpec>, template: Template) {
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@@ -810,6 +836,11 @@ fn define_memory(
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recipe.opcodes(&MOV_LOAD),
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is_load_complex_length_two.clone(),
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);
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e.enc_r32_r64_instp(
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load_complex,
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recipe.opcodes(&MOV_LOAD),
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is_load_complex_length_two.clone(),
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);
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e.enc_x86_64_instp(
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uload32_complex,
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recipe.opcodes(&MOV_LOAD),
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@@ -855,6 +886,11 @@ fn define_memory(
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recipe.opcodes(&MOV_STORE),
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is_store_complex_length_three.clone(),
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);
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e.enc_r32_r64_instp(
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store_complex,
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recipe.opcodes(&MOV_STORE),
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is_store_complex_length_three.clone(),
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);
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e.enc_x86_64_instp(
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istore32_complex,
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recipe.opcodes(&MOV_STORE),
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@@ -948,6 +984,10 @@ fn define_memory(
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e.enc64_rec(fill_nop.bind(ty), rec_ffillnull, 0);
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e.enc32_rec(fill_nop.bind(ty), rec_ffillnull, 0);
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}
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for &ty in &[R64, R32] {
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e.enc64_rec(fill_nop.bind(ty), rec_fillnull, 0);
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e.enc32_rec(fill_nop.bind(ty), rec_fillnull, 0);
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}
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// Load 32 bits from `b1`, `i8` and `i16` spill slots. See `spill.b1` above.
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@@ -211,7 +211,7 @@ fn define_control_flow(
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let iAddr = &TypeVar::new(
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"iAddr",
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"An integer address type",
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TypeSetBuilder::new().ints(32..64).build(),
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TypeSetBuilder::new().ints(32..64).refs(32..64).build(),
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);
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{
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@@ -744,7 +744,7 @@ pub(crate) fn define(
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let iAddr = &TypeVar::new(
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"iAddr",
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"An integer address type",
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TypeSetBuilder::new().ints(32..64).build(),
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TypeSetBuilder::new().ints(32..64).refs(32..64).build(),
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);
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let Ref = &TypeVar::new(
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