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Legalize fcvt_to_sint and fcvt_to_uint for Intel64.

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We need to generate traps on NaN and overflow.
This commit is contained in:
Jakob Stoklund Olesen
2017-09-28 10:54:56 -07:00
parent 34146435e5
commit 8abcdac5a1
3 changed files with 182 additions and 8 deletions
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lib/cretonne/meta/isa/intel/legalize.py
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@@ -99,3 +99,6 @@ intel_expand.custom_legalize(insts.fmax, 'expand_minmax')
# Conversions from unsigned need special handling.
intel_expand.custom_legalize(insts.fcvt_from_uint, 'expand_fcvt_from_uint')
# Conversions from float to int can trap.
intel_expand.custom_legalize(insts.fcvt_to_sint, 'expand_fcvt_to_sint')
intel_expand.custom_legalize(insts.fcvt_to_uint, 'expand_fcvt_to_uint')