Enable the wast::Cranelift::spec::simd::simd_store test for AArch64

Copyright (c) 2020, Arm Limited.

cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs

@@ -2164,6 +2164,15 @@ fn test_aarch64_binemit() {
         "mov v8.8b, v4.8b",
     ));
 
+    insns.push((
+        Inst::FpuMove128 {
+            rd: writable_vreg(17),
+            rn: vreg(26),
+        },
+        "511FBA4E",
+        "mov v17.16b, v26.16b",
+    ));
+
     insns.push((
         Inst::FpuRR {
             fpu_op: FPUOp1::Abs32,
@@ -2726,6 +2735,15 @@ fn test_aarch64_binemit() {
         "ldr d16, pc+8 ; b 12 ; data.f64 1",
     ));
 
+    insns.push((
+        Inst::LoadFpuConst128 {
+            rd: writable_vreg(5),
+            const_data: 0x0f0e0d0c0b0a09080706050403020100,
+        },
+        "4500009C05000014000102030405060708090A0B0C0D0E0F",
+        "ldr q5, pc+8 ; b 20 ; data.f128 0x0f0e0d0c0b0a09080706050403020100",
+    ));
+
     insns.push((
         Inst::FpuCSel32 {
             rd: writable_vreg(1),