Support IBM z/Architecture
This adds support for the IBM z/Architecture (s390x-ibm-linux). The status of the s390x backend in its current form is: - Wasmtime is fully functional and passes all tests on s390x. - All back-end features supported, with the exception of SIMD. - There is still a lot of potential for performance improvements. - Currently the only supported processor type is z15.
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79
cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif
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79
cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif
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@@ -0,0 +1,79 @@
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test compile
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target s390x
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;; Test default (non-SpiderMonkey) ABI.
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function %f1() -> i64, i64, i64, i64 {
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block1:
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v0 = iconst.i64 1
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v1 = iconst.i64 2
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v2 = iconst.i64 3
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v3 = iconst.i64 4
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return v0, v1, v2, v3
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}
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; check: lghi %r2, 1
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; nextln: lghi %r3, 2
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; nextln: lghi %r4, 3
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; nextln: lghi %r5, 4
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; nextln: br %r14
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function %f1() -> i64, i64, i64, i64, i64, i64 {
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block1:
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v0 = iconst.i64 1
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v1 = iconst.i64 2
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v2 = iconst.i64 3
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v3 = iconst.i64 4
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v4 = iconst.i64 5
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v5 = iconst.i64 6
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return v0, v1, v2, v3, v4, v5
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}
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; check: stmg %r12, %r15, 96(%r15)
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; nextln: lgr %r14, %r2
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; nextln: lghi %r2, 1
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; nextln: lghi %r3, 2
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; nextln: lghi %r4, 3
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; nextln: lghi %r5, 4
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; nextln: lghi %r13, 5
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; nextln: lghi %r12, 6
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; nextln: stg %r13, 0(%r14)
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; nextln: stg %r12, 8(%r14)
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; nextln: lmg %r12, %r15, 96(%r15)
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; nextln: br %r14
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;; Test default (non-SpiderMonkey) ABI.
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function %f3() -> f64, f64, f64, f64 {
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block1:
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v0 = f64const 0x0.0
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v1 = f64const 0x1.0
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v2 = f64const 0x2.0
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v3 = f64const 0x3.0
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return v0, v1, v2, v3
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}
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; check: bras %r1, 12 ; data.f64 0 ; ld %f0, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 1 ; ld %f2, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 2 ; ld %f4, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 3 ; ld %f6, 0(%r1)
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; nextln: br %r14
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function %f4() -> f64, f64, f64, f64, f64, f64 {
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block1:
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v0 = f64const 0x0.0
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v1 = f64const 0x1.0
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v2 = f64const 0x2.0
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v3 = f64const 0x3.0
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v4 = f64const 0x4.0
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v5 = f64const 0x5.0
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return v0, v1, v2, v3, v4, v5
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}
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; check: bras %r1, 12 ; data.f64 0 ; ld %f0, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 1 ; ld %f2, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 2 ; ld %f4, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 3 ; ld %f6, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 4 ; ld %f1, 0(%r1)
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; nextln: bras %r1, 12 ; data.f64 5 ; ld %f3, 0(%r1)
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; nextln: std %f1, 0(%r2)
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; nextln: std %f3, 8(%r2)
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; nextln: br %r14
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