Add jump encodings to RISC-V.

Fix a bug in gen_encoding.py when dealing with non-polymorphic
instructions where the type variable is None in Python, VOID in Rust.

lib/cretonne/meta/isa/riscv/encodings.py

@@ -5,8 +5,8 @@ from __future__ import absolute_import
 from base import instructions as base
 from base.immediates import intcc
 from .defs import RV32, RV64
-from .recipes import OPIMM, OPIMM32, OP, OP32, LUI, BRANCH
-from .recipes import JALR, R, Rshamt, Ricmp, I, Iicmp, Iret, U, SB, SBzero
+from .recipes import OPIMM, OPIMM32, OP, OP32, LUI, BRANCH, JALR, JAL
+from .recipes import R, Rshamt, Ricmp, I, Iicmp, Iret, U, UJ, SB, SBzero
 from .settings import use_m
 from cdsl.ast import Var
 
@@ -81,6 +81,10 @@ RV64.enc(base.imul.i32, R, OP32(0b000, 0b0000001), isap=use_m)
 
 # Control flow.
 
+# Unconditional branches.
+RV32.enc(base.jump, UJ, JAL())
+RV64.enc(base.jump, UJ, JAL())
+
 # Conditional branches.
 for cond,           f3 in [
         (intcc.eq,  0b000),