T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Remove FPR32; fixes #1303

Browse Source 
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's `i64x2.mul` was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.
This commit is contained in:
Andrew Brown
2020-03-13 14:54:23 -07:00
parent af709ded94
commit 8598295bc4
6 changed files with 34 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
cranelift/codegen/src/isa/x86/registers.rs
View File

@@ -33,11 +33,12 @@ mod tests {
assert_eq!(INFO.parse_regunit("xmm0"), fpr(0));
assert_eq!(INFO.parse_regunit("xmm15"), fpr(15));
fn fpr32(unit: usize) -> Option<u16> {
Some(FPR32.unit(unit))
}
assert_eq!(INFO.parse_regunit("xmm0"), fpr32(0));
assert_eq!(INFO.parse_regunit("xmm31"), fpr32(31));
// FIXME(#1306) Add these tests back in when FPR32 is re-added.
// fn fpr32(unit: usize) -> Option<u16> {
// Some(FPR32.unit(unit))
// }
// assert_eq!(INFO.parse_regunit("xmm0"), fpr32(0));
// assert_eq!(INFO.parse_regunit("xmm31"), fpr32(31));
}
#[test]
@@ -62,11 +63,12 @@ mod tests {
assert_eq!(fpr(0), "%xmm0");
assert_eq!(fpr(15), "%xmm15");
fn fpr32(ru: RegUnit) -> String {
INFO.display_regunit(FPR32.first + ru).to_string()
}
assert_eq!(fpr32(0), "%xmm0");
assert_eq!(fpr32(31), "%xmm31");
// FIXME(#1306) Add these tests back in when FPR32 is re-added.
// fn fpr32(ru: RegUnit) -> String {
// INFO.display_regunit(FPR32.first + ru).to_string()
// }
// assert_eq!(fpr32(0), "%xmm0");
// assert_eq!(fpr32(31), "%xmm31");
}
#[test]