Implement Unarrow, Uunarrow, and Snarrow for the interpreter

Implemented the following Opcodes for the Cranelift interpreter:
- `Unarrow` to combine two SIMD vectors into a new vector with twice
the lanes but half the width, with signed inputs which are clamped to
`0x00`.
- `Uunarrow` to perform the same operation as `Unarrow` but treating
inputs as unsigned.
- `Snarrow` to perform the same operation as `Unarrow` but treating
both inputs and outputs as signed, and saturating accordingly.

Note that all 3 instructions saturate at the type boundaries.

Copyright (c) 2021, Arm Limited
This commit is contained in:
dheaton-arm
2021-09-08 17:04:05 +01:00
parent 2412e8d784
commit 83c3bc5b9d
9 changed files with 161 additions and 10 deletions

View File

@@ -79,6 +79,29 @@ impl Type {
}
}
/// Get the (minimum, maximum) values represented by each lane in the type.
pub fn bounds(self, signed: bool) -> (i128, i128) {
if signed {
match self.lane_type() {
I8 => (i8::MIN as i128, i8::MAX as i128),
I16 => (i16::MIN as i128, i16::MAX as i128),
I32 => (i32::MIN as i128, i32::MAX as i128),
I64 => (i64::MIN as i128, i64::MAX as i128),
I128 => (i128::MIN, i128::MAX),
_ => unimplemented!(),
}
} else {
match self.lane_type() {
I8 => (u8::MIN as i128, u8::MAX as i128),
I16 => (u16::MIN as i128, u16::MAX as i128),
I32 => (u32::MIN as i128, u32::MAX as i128),
I64 => (u64::MIN as i128, u64::MAX as i128),
I128 => (u128::MIN as i128, u128::MAX as i128),
_ => unimplemented!(),
}
}
}
/// Get an integer type with the requested number of bits.
pub fn int(bits: u16) -> Option<Self> {
match bits {