T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

s390x: Fix regalloc checker error (#4973)

Browse Source 
For ShiftRR and VecShiftRR, if shift_reg is zero_reg(), the
instruction does not actually use any register value.

Fixes #4969
This commit is contained in:
Ulrich Weigand
2022-09-28 16:25:23 +01:00
committed by GitHub
parent cdecc858b4
commit 83bb6fd4c8
1 changed files with 6 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
cranelift/codegen/src/isa/s390x/inst/mod.rs
View File

@@ -539,7 +539,9 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
} => {
collector.reg_def(rd);
collector.reg_use(rn);
collector.reg_use(shift_reg);
if shift_reg != zero_reg() {
collector.reg_use(shift_reg);
}
}
&Inst::RxSBG { rd, rn, .. } => {
collector.reg_mod(rd);
@@ -744,7 +746,9 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
} => {
collector.reg_def(rd);
collector.reg_use(rn);
collector.reg_use(shift_reg);
if shift_reg != zero_reg() {
collector.reg_use(shift_reg);
}
}
&Inst::VecSelect { rd, rn, rm, ra, .. } => {
collector.reg_def(rd);