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Fix a typo.

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This commit is contained in:
Dan Gohman
2017-10-20 16:01:39 -07:00
parent c93959de7e
commit 8387c53c3f
1 changed files with 1 additions and 1 deletions
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cranelift/docs/regalloc.rst
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@@ -226,7 +226,7 @@ The interference can be resolved by isolating the SSA values passed as EBB argum
return v3
}
Now the EBB argument is ``v5`` which is *not* isself live into ``ebb1``,
Now the EBB argument is ``v5`` which is *not* itself live into ``ebb1``,
resolving the interference.
The coalescing pass groups the SSA values into sets called *virtual registers*