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Implement inline stack probes for AArch64 (#5353)

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* Turn off probestack by default in Cranelift

The probestack feature is not implemented for the aarch64 and s390x
backends and currently the on-by-default status requires the aarch64 and
s390x implementations to be a stub. Turning off probestack by default
allows the s390x and aarch64 backends to panic with an error message to
avoid providing a false sense of security. When the probestack option is
implemented for all backends, however, it may be reasonable to
re-enable.

* aarch64: Improve codegen for AMode fallback

Currently the final fallback for finalizing an `AMode` will generate
both a constant-loading instruction as well as an `add` instruction to
the base register into the same temporary. This commit improves the
codegen by removing the `add` instruction and folding the final add into
the finalized `AMode`. This changes the `extendop` used but both
registers are 64-bit so shouldn't be affected by the extending
operation.

* aarch64: Implement inline stack probes

This commit implements inline stack probes for the aarch64 backend in
Cranelift. The support here is modeled after the x64 support where
unrolled probes are used up to a particular threshold after which a loop
is generated. The instructions here are similar in spirit to x64 except
that unlike x64 the stack pointer isn't modified during the unrolled
loop to avoid needing to re-adjust it back up at the end of the loop.

* Enable inline probestack for AArch64 and Riscv64

This commit enables inline probestacks for the AArch64 and Riscv64
architectures in the same manner that x86_64 has it enabled now. Some
more testing was additionally added since on Unix platforms we should be
guaranteed that Rust's stack overflow message is now printed too.

* Enable probestack for aarch64 in cranelift-fuzzgen

* Address review comments

* Remove implicit stack overflow traps from x64 backend

This commit removes implicit `StackOverflow` traps inserted by the x64
backend for stack-based operations. This was historically required when
stack overflow was detected with page faults but Wasmtime no longer
requires that since it's not suitable for wasm modules which call host
functions. Additionally no other backend implements this form of
implicit trap-code additions so this is intended to synchronize the
behavior of all the backends.

This fixes a test added prior for aarch64 to properly abort the process
instead of accidentally being caught by Wasmtime.

* Fix a style issue
This commit is contained in:
Alex Crichton
2022-11-30 12:30:00 -06:00
committed by GitHub
parent 8bc7550211
commit 830885383f
22 changed files with 367 additions and 177 deletions
Download Patch File Download Diff File Expand all files Collapse all files

71
cranelift/codegen/src/isa/x64/inst/emit.rs
View File

@@ -171,7 +171,6 @@ pub(crate) fn emit(
let amode = addr.finalize(state, sink);
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
0x0FAF,
2,
@@ -223,7 +222,6 @@ pub(crate) fn emit(
// Here we revert to the "normal" G-E ordering.
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
opcode_m,
1,
@@ -275,7 +273,6 @@ pub(crate) fn emit(
let enc_g = int_reg_enc(src2);
emit_std_enc_mem(
sink,
info,
LegacyPrefixes::None,
opcode,
1,
@@ -317,17 +314,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr: src } => {
let amode = src.finalize(state, sink).with_allocs(allocs);
emit_std_reg_mem(
sink,
info,
prefix,
opcode,
num_opcodes,
dst,
&amode,
rex_flags,
0,
);
emit_std_reg_mem(sink, prefix, opcode, num_opcodes, dst, &amode, rex_flags, 0);
}
}
}
@@ -414,7 +401,6 @@ pub(crate) fn emit(
let amode = src.finalize(state, sink).with_allocs(allocs);
emit_std_enc_mem(
sink,
info,
prefix,
opcode,
1,
@@ -459,7 +445,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr: src } => {
let amode = src.finalize(state, sink).with_allocs(allocs);
emit_std_enc_mem(sink, info, prefix, 0xF7, 1, subopcode, &amode, rex_flags, 0);
emit_std_enc_mem(sink, prefix, 0xF7, 1, subopcode, &amode, rex_flags, 0);
}
}
}
@@ -779,7 +765,6 @@ pub(crate) fn emit(
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
opcodes,
num_opcodes,
@@ -798,7 +783,6 @@ pub(crate) fn emit(
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
0x8B,
1,
@@ -815,7 +799,6 @@ pub(crate) fn emit(
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
0x8D,
1,
@@ -877,7 +860,6 @@ pub(crate) fn emit(
emit_std_reg_mem(
sink,
info,
LegacyPrefixes::None,
opcodes,
num_opcodes,
@@ -913,7 +895,7 @@ pub(crate) fn emit(
// 16-bit: MOV r16, r/m16 is 66 (REX.W==0) 89 /r
// 32-bit: MOV r32, r/m32 is (REX.W==0) 89 /r
// 64-bit: MOV r64, r/m64 is (REX.W==1) 89 /r
emit_std_reg_mem(sink, info, prefix, opcode, 1, src, dst, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, 1, src, dst, rex, 0);
}
Inst::ShiftR {
@@ -1023,7 +1005,7 @@ pub(crate) fn emit(
}
RegMemImm::Mem { addr } => {
let addr = &addr.finalize(state, sink).with_allocs(allocs);
emit_std_reg_mem(sink, info, prefix, opcode_bytes, 2, dst, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode_bytes, 2, dst, addr, rex, 0);
}
RegMemImm::Imm { .. } => unreachable!(),
}
@@ -1078,7 +1060,7 @@ pub(crate) fn emit(
(OperandSize::Size8, false) => 0x84,
(_, false) => 0x85,
};
emit_std_reg_mem(sink, info, prefix, opcode, 1, reg_g, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, 1, reg_g, addr, rex, 0);
}
RegMemImm::Imm { simm32 } => {
@@ -1167,7 +1149,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink).with_allocs(allocs);
emit_std_reg_mem(sink, info, prefix, opcode, 2, dst, addr, rex_flags, 0);
emit_std_reg_mem(sink, prefix, opcode, 2, dst, addr, rex_flags, 0);
}
}
}
@@ -1210,10 +1192,6 @@ pub(crate) fn emit(
Inst::Push64 { src } => {
let src = src.clone().to_reg_mem_imm().with_allocs(allocs);
if info.flags.enable_probestack() {
sink.add_trap(TrapCode::StackOverflow);
}
match src {
RegMemImm::Reg { reg } => {
let enc_reg = int_reg_enc(reg);
@@ -1228,7 +1206,6 @@ pub(crate) fn emit(
let addr = &addr.finalize(state, sink);
emit_std_enc_mem(
sink,
info,
LegacyPrefixes::None,
0xFF,
1,
@@ -1369,9 +1346,6 @@ pub(crate) fn emit(
info: call_info,
..
} => {
if info.flags.enable_probestack() {
sink.add_trap(TrapCode::StackOverflow);
}
if let Some(s) = state.take_stack_map() {
sink.add_stack_map(StackMapExtent::UpcomingBytes(5), s);
}
@@ -1392,9 +1366,6 @@ pub(crate) fn emit(
} => {
let dest = dest.with_allocs(allocs);
if info.flags.enable_probestack() {
sink.add_trap(TrapCode::StackOverflow);
}
let start_offset = sink.cur_offset();
match dest {
RegMem::Reg { reg } => {
@@ -1414,7 +1385,6 @@ pub(crate) fn emit(
let addr = &addr.finalize(state, sink);
emit_std_enc_mem(
sink,
info,
LegacyPrefixes::None,
0xFF,
1,
@@ -1516,7 +1486,6 @@ pub(crate) fn emit(
let addr = &addr.finalize(state, sink);
emit_std_enc_mem(
sink,
info,
LegacyPrefixes::None,
0xFF,
1,
@@ -1739,7 +1708,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcode, num_opcodes, reg_g, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, num_opcodes, reg_g, addr, rex, 0);
}
};
}
@@ -1765,7 +1734,7 @@ pub(crate) fn emit(
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
// N.B.: bytes_at_end == 1, because of the `imm` byte below.
emit_std_reg_mem(sink, info, prefix, opcode, len, dst, addr, rex, 1);
emit_std_reg_mem(sink, prefix, opcode, len, dst, addr, rex, 1);
}
}
sink.put1(*imm);
@@ -1918,7 +1887,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcode, length, reg_g, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, length, reg_g, addr, rex, 0);
}
}
}
@@ -1951,7 +1920,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcode, length, reg_g, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, length, reg_g, addr, rex, 0);
}
}
}
@@ -2191,7 +2160,7 @@ pub(crate) fn emit(
"No existing way to encode a mem argument in the ModRM r/m field."
);
// N.B.: bytes_at_end == 1, because of the `imm` byte below.
emit_std_reg_mem(sink, info, prefix, opcode, len, dst, addr, rex, 1);
emit_std_reg_mem(sink, prefix, opcode, len, dst, addr, rex, 1);
}
}
sink.put1(*imm);
@@ -2217,17 +2186,7 @@ pub(crate) fn emit(
_ => unimplemented!("Opcode {:?} not implemented", op),
};
let dst = &dst.finalize(state, sink);
emit_std_reg_mem(
sink,
info,
prefix,
opcode,
2,
src,
dst,
RexFlags::clear_w(),
0,
);
emit_std_reg_mem(sink, prefix, opcode, 2, src, dst, RexFlags::clear_w(), 0);
}
Inst::XmmToGpr {
@@ -2280,7 +2239,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcode, 2, reg_g, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, 2, reg_g, addr, rex, 0);
}
}
}
@@ -2303,7 +2262,7 @@ pub(crate) fn emit(
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcode, len, dst, addr, rex, 0);
emit_std_reg_mem(sink, prefix, opcode, len, dst, addr, rex, 0);
}
}
}
@@ -2912,7 +2871,7 @@ pub(crate) fn emit(
};
let rex = RexFlags::from((OperandSize::from_ty(*ty), replacement));
let amode = mem.finalize(state, sink);
emit_std_reg_mem(sink, info, prefix, opcodes, 2, replacement, &amode, rex, 0);
emit_std_reg_mem(sink, prefix, opcodes, 2, replacement, &amode, rex, 0);
}
Inst::AtomicRmwSeq {