Remove printlns, make pushing stack arguments work properly
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@@ -1372,20 +1372,32 @@ impl<M: ModuleContext> Context<'_, M> {
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store!(i64_store, Rq, QWORD, "i64.store");
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fn push_physical(&mut self, value: ValueLocation) -> ValueLocation {
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self.block_state.depth.reserve(1);
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match value {
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ValueLocation::Reg(gpr) => {
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self.block_state.depth.reserve(1);
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// TODO: Proper stack allocation scheme
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dynasm!(self.asm
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; push Rq(gpr)
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);
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self.block_state.regs.release_scratch_gpr(gpr);
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}
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ValueLocation::Stack(o) => {
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let offset = self.adjusted_offset(o);
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dynasm!(self.asm
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; push QWORD [rsp + offset]
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);
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}
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ValueLocation::Immediate(imm) => {
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let gpr = self.block_state.regs.take_scratch_gpr();
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dynasm!(self.asm
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; mov Rq(gpr), QWORD imm
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; push Rq(gpr)
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);
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self.block_state.regs.release_scratch_gpr(gpr);
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}
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}
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ValueLocation::Stack(-(self.block_state.depth.0 as i32))
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}
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value => value,
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}
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}
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fn push(&mut self, value: ValueLocation) {
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self.block_state.stack.push(value);
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@@ -1823,13 +1835,11 @@ impl<M: ModuleContext> Context<'_, M> {
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for &loc in out_locs.iter().rev() {
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let val = self.pop();
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println!("{:?}", loc);
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match loc {
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CCLoc::Stack(offset) => {
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let offset = self.adjusted_offset(offset as i32 - depth as i32);
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if offset == -1 {
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if offset == -(WORD_SIZE as i32) {
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self.push_physical(val);
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} else {
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let gpr = self.into_reg(val);
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@@ -1856,8 +1866,6 @@ impl<M: ModuleContext> Context<'_, M> {
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while !pending.is_empty() {
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try_count -= 1;
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println!("{:?}", self.block_state);
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if try_count == 0 {
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unimplemented!("We can't handle cycles in the register allocation right now");
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}
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@@ -129,7 +129,7 @@ pub fn code(
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&body,
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);
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if true {
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if false {
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let mut microwasm = vec![];
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let mut microwasm_conv = MicrowasmConv::new(
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