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Implement shift-immediate encodings for x86 (#283)

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* add x86 encodings for shift-immediate instructions

implements encodings for ishl_imm, sshr_imm, and ushr_imm. uses 8-bit immediates.

added tests for the encodings to intel/binary64.cton. Canonical versions
come from llvm-mc.

* translate test to use shift-immediates

* shift immediate encodings: use enc_i32_i64

and note why the regular shift encodings cant use it above

* add additional encoding tests for shift immediates

this covers 32 bit mode, and 64 bit operations in 64 bit mode.
This commit is contained in:
Pat Hickey
2018-03-26 16:48:20 -07:00
committed by Dan Gohman
parent 51eea8b89d
commit 80d2c5d9bf
6 changed files with 59 additions and 24 deletions
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7
cranelift/filetests/isa/intel/binary32.cton
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@@ -403,6 +403,13 @@ ebb0:
; asm: addl $-2147483648, %esp
adjust_sp_imm -2147483648 ; bin: 81 c4 80000000
; Shift immediates
; asm: shll $2, %esi
[-,%rsi] v513 = ishl_imm v2, 2 ; bin: c1 e6 02
; asm: sarl $5, %esi
[-,%rsi] v514 = sshr_imm v2, 5 ; bin: c1 fe 05
; asm: shrl $8, %esi
[-,%rsi] v515 = ushr_imm v2, 8 ; bin: c1 ee 08
; asm: testl %ecx, %ecx
; asm: je ebb1