Implement shift-immediate encodings for x86 (#283)

* add x86 encodings for shift-immediate instructions

implements encodings for ishl_imm, sshr_imm, and ushr_imm. uses 8-bit immediates.

added tests for the encodings to intel/binary64.cton. Canonical versions
come from llvm-mc.

* translate test to use shift-immediates

* shift immediate encodings: use enc_i32_i64

and note why the regular shift encodings cant use it above

* add additional encoding tests for shift immediates

this covers 32 bit mode, and 64 bit operations in 64 bit mode.

cranelift/filetests/isa/intel/baseline_clz_ctz_popcount.cton

@@ -47,28 +47,23 @@ ebb1(v20: i32):
 function %i64_popcount(i64) -> i64 {
 ebb0(v30: i64):
   v31 = popcnt v30;
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: iconst.i64
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: iadd
   ; check: iconst.i64
   ; check: band
   ; check: iconst.i64
   ; check: imul
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   return v31;
 }
 
@@ -78,27 +73,22 @@ ebb0(v30: i64):
 function %i32_popcount(i32) -> i32 {
 ebb0(v40: i32):
   v41 = popcnt v40;
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: iconst.i32
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: band
   ; check: isub
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   ; check: iadd
   ; check: iconst.i32
   ; check: band
   ; check: iconst.i32
   ; check: imul
-  ; check: iconst.i32
-  ; check: ushr
+  ; check: ushr_imm
   return v41;
 }