From 7f840870c727ca7037111600768b057baa2387a0 Mon Sep 17 00:00:00 2001 From: Alex Crichton Date: Tue, 26 Jan 2021 16:42:11 -0600 Subject: [PATCH] cranelift-native: Use libstd feature detection (#2607) This commit switches cranelift-native to useing the `is_x86_feature_detected!` macro in the standard library instead of the `raw-cpuid` crate. --- Cargo.lock | 10 ----- cranelift/native/Cargo.toml | 3 -- cranelift/native/src/lib.rs | 74 ++++++++++++++++--------------------- 3 files changed, 31 insertions(+), 56 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 86cbcb9f6b..ead0ab8413 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -607,7 +607,6 @@ name = "cranelift-native" version = "0.69.0" dependencies = [ "cranelift-codegen", - "raw-cpuid", "target-lexicon", ] @@ -2145,15 +2144,6 @@ dependencies = [ "rand_core 0.5.1", ] -[[package]] -name = "raw-cpuid" -version = "9.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c27cb5785b85bd05d4eb171556c9a1a514552e26123aeae6bb7d811353148026" -dependencies = [ - "bitflags", -] - [[package]] name = "rawbytes" version = "0.1.1" diff --git a/cranelift/native/Cargo.toml b/cranelift/native/Cargo.toml index 047d21261a..3bcd72d699 100644 --- a/cranelift/native/Cargo.toml +++ b/cranelift/native/Cargo.toml @@ -14,9 +14,6 @@ edition = "2018" cranelift-codegen = { path = "../codegen", version = "0.69.0", default-features = false } target-lexicon = "0.11" -[target.'cfg(any(target_arch = "x86", target_arch = "x86_64"))'.dependencies] -raw-cpuid = "9.0.0" - [features] default = ["std"] std = ["cranelift-codegen/std"] diff --git a/cranelift/native/src/lib.rs b/cranelift/native/src/lib.rs index 8dffd8ff79..43938bd97e 100644 --- a/cranelift/native/src/lib.rs +++ b/cranelift/native/src/lib.rs @@ -22,14 +22,10 @@ clippy::use_self ) )] -#![no_std] use cranelift_codegen::isa; use target_lexicon::Triple; -#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] -use raw_cpuid::CpuId; - /// Return an `isa` builder configured for the current host /// machine, or `Err(())` if the host machine is not supported /// in the current configuration. @@ -56,72 +52,64 @@ pub fn builder_with_options( isa::LookupError::Unsupported => "unsupported architecture", })?; - if infer_native_flags && cfg!(any(target_arch = "x86", target_arch = "x86_64")) { - parse_x86_cpuid(&mut isa_builder)?; - } + #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] + { + use cranelift_codegen::settings::Configurable; - Ok(isa_builder) -} - -#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] -fn parse_x86_cpuid(isa_builder: &mut isa::Builder) -> Result<(), &'static str> { - use cranelift_codegen::settings::Configurable; - let cpuid = CpuId::new(); - - if let Some(info) = cpuid.get_feature_info() { - if !info.has_sse2() { + if !std::is_x86_feature_detected!("sse2") { return Err("x86 support requires SSE2"); } - if info.has_sse3() { + + if !infer_native_flags { + return Ok(isa_builder); + } + + if std::is_x86_feature_detected!("sse3") { isa_builder.enable("has_sse3").unwrap(); } - if info.has_ssse3() { + if std::is_x86_feature_detected!("ssse3") { isa_builder.enable("has_ssse3").unwrap(); } - if info.has_sse41() { + if std::is_x86_feature_detected!("sse4.1") { isa_builder.enable("has_sse41").unwrap(); } - if info.has_sse42() { + if std::is_x86_feature_detected!("sse4.2") { isa_builder.enable("has_sse42").unwrap(); } - if info.has_popcnt() { + if std::is_x86_feature_detected!("popcnt") { isa_builder.enable("has_popcnt").unwrap(); } - if info.has_avx() { + if std::is_x86_feature_detected!("avx") { isa_builder.enable("has_avx").unwrap(); } - } - if let Some(info) = cpuid.get_extended_feature_info() { - if info.has_bmi1() { - isa_builder.enable("has_bmi1").unwrap(); - } - if info.has_bmi2() { - isa_builder.enable("has_bmi2").unwrap(); - } - if info.has_avx2() { + if std::is_x86_feature_detected!("avx2") { isa_builder.enable("has_avx2").unwrap(); } - if info.has_avx512dq() { + if std::is_x86_feature_detected!("bmi1") { + isa_builder.enable("has_bmi1").unwrap(); + } + if std::is_x86_feature_detected!("bmi2") { + isa_builder.enable("has_bmi2").unwrap(); + } + if std::is_x86_feature_detected!("avx512dq") { isa_builder.enable("has_avx512dq").unwrap(); } - if info.has_avx512vl() { + if std::is_x86_feature_detected!("avx512vl") { isa_builder.enable("has_avx512vl").unwrap(); } - if info.has_avx512f() { + if std::is_x86_feature_detected!("avx512f") { isa_builder.enable("has_avx512f").unwrap(); } - } - if let Some(info) = cpuid.get_extended_function_info() { - if info.has_lzcnt() { + if std::is_x86_feature_detected!("lzcnt") { isa_builder.enable("has_lzcnt").unwrap(); } } - Ok(()) -} -#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))] -fn parse_x86_cpuid(_isa_builder: &mut isa::Builder) -> Result<(), &'static str> { - unreachable!(); + // squelch warnings about unused mut/variables on some platforms. + drop(&mut isa_builder); + drop(infer_native_flags); + + Ok(isa_builder) } #[cfg(test)]