riscv64: Add masking for small types when lowering select (#5504)

When lowering `select+icmp` we have an optimization that allows us to
avoid materializing the icmp result.

We were accidentally not masking the high bits for i8 and i16 in this case.

Issue #5498 reported this as an illegal instruction but what was happening
there was that the invalid select caused a division by zero.

cranelift/filetests/filetests/isa/riscv64/condops.clif

@@ -11,8 +11,10 @@ block0(v0: i8, v1: i64, v2: i64):
 }
 
 ; block0:
-;   li a3,42
-;   select_reg a0,a1,a2##condition=(a0 eq a3)
+;   andi a3,a0,255
+;   li a4,42
+;   andi a5,a4,255
+;   select_reg a0,a1,a2##condition=(a3 eq a5)
 ;   ret
 
 function %g(i8) -> i8 {
@@ -62,8 +64,10 @@ block0(v0: i32, v1: i8, v2: i8):
 }
 
 ; block0:
-;   li a3,42
-;   select_reg a0,a1,a2##condition=(a0 eq a3)
+;   addiw a3,a0,0
+;   li a4,42
+;   addiw a5,a4,0
+;   select_reg a0,a1,a2##condition=(a3 eq a5)
 ;   ret
 
 function %i128_select(i8, i128, i128) -> i128 {