Add a RISC-V target.

Flesh out the directory structure for defining target instruction set architectures. Use RISC-V as a startgin point because it is so simple.
2016-04-06 11:32:43 -07:00
parent 936d6e523a
commit 7bf4570ba1
6 changed files with 83 additions and 3 deletions
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1 @@
 *.pyc
-Cargo.lock
-target