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Rename sarg__ to sarg_t

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This commit is contained in:
bjorn3
2020-07-15 20:56:25 +02:00
committed by Benjamin Bouvier
parent 4971d9ee80
commit 7b7b1f4997
10 changed files with 22 additions and 22 deletions
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4
cranelift/codegen/meta/src/cdsl/types.rs
View File

@@ -424,7 +424,7 @@ impl SpecialType {
flags can be tested with a :type:`floatcc` condition code.",
),
SpecialType::StructArgument => {
String::from("After legalization sarg__ arguments will get this type.")
String::from("After legalization sarg_t arguments will get this type.")
}
}
}
@@ -452,7 +452,7 @@ impl fmt::Display for SpecialType {
match *self {
SpecialType::Flag(shared_types::Flag::IFlags) => write!(f, "iflags"),
SpecialType::Flag(shared_types::Flag::FFlags) => write!(f, "fflags"),
SpecialType::StructArgument => write!(f, "sarg__"),
SpecialType::StructArgument => write!(f, "sarg_t"),
}
}
}

6
cranelift/codegen/meta/src/isa/x86/encodings.rs
View File

@@ -465,7 +465,7 @@ fn define_moves(e: &mut PerCpuModeEncodings, shared_defs: &SharedDefinitions, r:
let sextend = shared.by_name("sextend");
let set_pinned_reg = shared.by_name("set_pinned_reg");
let uextend = shared.by_name("uextend");
let dummy_sarg__ = shared.by_name("dummy_sarg__");
let dummy_sarg_t = shared.by_name("dummy_sarg_t");
// Shorthands for recipes.
let rec_copysp = r.template("copysp");
@@ -483,7 +483,7 @@ fn define_moves(e: &mut PerCpuModeEncodings, shared_defs: &SharedDefinitions, r:
let rec_umr_reg_to_ssa = r.template("umr_reg_to_ssa");
let rec_urm_noflags = r.template("urm_noflags");
let rec_urm_noflags_abcd = r.template("urm_noflags_abcd");
let rec_dummy_sarg__ = r.recipe("dummy_sarg__");
let rec_dummy_sarg_t = r.recipe("dummy_sarg_t");
// The pinned reg is fixed to a certain value entirely user-controlled, so it generates nothing!
e.enc64_rec(get_pinned_reg.bind(I64), rec_get_pinned_reg, 0);
@@ -750,7 +750,7 @@ fn define_moves(e: &mut PerCpuModeEncodings, shared_defs: &SharedDefinitions, r:
rec_furm_reg_to_ssa.opcodes(&MOVSS_LOAD),
);
e.enc_32_64_rec(dummy_sarg__, rec_dummy_sarg__, 0);
e.enc_32_64_rec(dummy_sarg_t, rec_dummy_sarg_t, 0);
}
#[inline(never)]

2
cranelift/codegen/meta/src/isa/x86/recipes.rs
View File

@@ -1271,7 +1271,7 @@ pub(crate) fn define<'shared>(
}
recipes.add_recipe(
EncodingRecipeBuilder::new("dummy_sarg__", &formats.nullary, 0)
EncodingRecipeBuilder::new("dummy_sarg_t", &formats.nullary, 0)
.operands_out(vec![Stack::new(gpr)])
.emit(""),
);

8
cranelift/codegen/meta/src/shared/instructions.rs
View File

@@ -1870,14 +1870,14 @@ pub(crate) fn define(
.specials(vec![crate::cdsl::types::SpecialType::StructArgument])
.build(),
);
let sarg__ = &Operand::new("sarg__", Sarg);
let sarg_t = &Operand::new("sarg_t", Sarg);
// FIXME remove once the old style codegen backends are removed.
ig.push(
Inst::new(
"dummy_sarg__",
"dummy_sarg_t",
r#"
This creates a sarg__
This creates a sarg_t
This instruction is internal and should not be created by
Cranelift users.
@@ -1885,7 +1885,7 @@ pub(crate) fn define(
&formats.nullary,
)
.operands_in(vec![])
.operands_out(vec![sarg__]),
.operands_out(vec![sarg_t]),
);
let src = &Operand::new("src", &imm.regunit);

2
cranelift/codegen/src/ir/types.rs
View File

@@ -343,7 +343,7 @@ impl Display for Type {
f.write_str(match *self {
IFLAGS => "iflags",
FFLAGS => "fflags",
SARG__ => "sarg__",
SARG_T => "sarg_t",
INVALID => panic!("INVALID encountered"),
_ => panic!("Unknown Type(0x{:x})", self.0),
})

2
cranelift/codegen/src/isa/aarch64/lower_inst.rs
View File

@@ -2152,7 +2152,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
panic!("x86-specific opcode in supposedly arch-neutral IR!");
}
Opcode::DummySarg => unreachable!(),
Opcode::DummySargT => unreachable!(),
Opcode::AvgRound => unimplemented!(),
Opcode::Iabs => unimplemented!(),

2
cranelift/codegen/src/isa/x86/abi.rs
View File

@@ -118,7 +118,7 @@ impl ArgAssigner for Args {
let loc = ArgumentLoc::Stack(self.offset as i32);
self.offset += size;
debug_assert!(self.offset <= i32::MAX as u32);
return ArgAction::AssignAndChangeType(loc, types::SARG__);
return ArgAction::AssignAndChangeType(loc, types::SARG_T);
}
let ty = arg.value_type;

4
cranelift/codegen/src/legalizer/boundary.rs
View File

@@ -127,7 +127,7 @@ fn legalize_entry_params(func: &mut Function, entry: Block) {
let dummy = pos
.func
.dfg
.append_block_param(entry, crate::ir::types::SARG__);
.append_block_param(entry, crate::ir::types::SARG_T);
pos.func.locations[dummy] = ValueLoc::Stack(ss);
abi_arg += 1;
continue;
@@ -1127,7 +1127,7 @@ fn spill_call_arguments(pos: &mut FuncCursor, isa: &dyn TargetIsa) -> bool {
let libc_memcpy = import_memcpy(pos.func, pointer_type);
pos.ins().call(libc_memcpy, &[dest, src, size]);
pos.ins().dummy_sarg__()
pos.ins().dummy_sarg_t()
} else {
// Non struct argument
pos.ins().spill(arg)

8
cranelift/filetests/filetests/isa/x86/struct-arg.clif
View File

@@ -8,11 +8,11 @@ block0(v0: i64):
return v1
}
; check: function u0:0(sarg__ sarg(64) [0], i64 fp [%rbp]) -> i8 [%rax], i64 fp [%rbp] system_v {
; check: function u0:0(sarg_t sarg(64) [0], i64 fp [%rbp]) -> i8 [%rax], i64 fp [%rbp] system_v {
; nextln: ss0 = incoming_arg 64, offset 0
; nextln: ss1 = incoming_arg 16, offset -16
; check: block0(v3: sarg__ [ss0], v5: i64 [%rbp]):
; check: block0(v3: sarg_t [ss0], v5: i64 [%rbp]):
; nextln: [RexOp1pushq#50] x86_push v5
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
; nextln: [RexOp1spaddr_id#808d,%rax] v2 = stack_addr.i64 ss0
@@ -34,7 +34,7 @@ block0(v0: i64):
; check: function u0:1(i64 [%rdi], i64 fp [%rbp]) -> i8 [%rax], i64 fp [%rbp] system_v {
; nextln: ss0 = outgoing_arg 64, offset 0
; nextln: ss1 = incoming_arg 16, offset -16
; nextln: sig0 = (sarg__ sarg(64) [0]) -> i8 [%rax] system_v
; nextln: sig0 = (sarg_t sarg(64) [0]) -> i8 [%rax] system_v
; nextln: sig1 = (i64 [%rdi], i64 [%rsi], i64 [%rdx]) system_v
; nextln: fn1 = u0:0 sig0
; nextln: fn2 = %Memcpy sig1
@@ -49,7 +49,7 @@ block0(v0: i64):
; nextln: [RexOp1rmov#8089] regmove v2, %rax -> %rdi
; nextln: [RexOp1rmov#8089] regmove v3, %rcx -> %rdx
; nextln: [Op1call_plt_id#e8] call fn2(v2, v0, v3)
; nextln: [dummy_sarg__#00,ss0] v4 = dummy_sarg__
; nextln: [dummy_sarg_t#00,ss0] v4 = dummy_sarg_t
; nextln: [Op1call_plt_id#e8,%rax] v1 = call fn1(v4)
; nextln: [RexOp1adjustsp_ib#8083] adjust_sp_up_imm 64
; nextln: [RexOp1popq#58,%rbp] v6 = x86_pop.i64

6
cranelift/reader/src/lexer.rs
View File

@@ -329,7 +329,7 @@ impl<'a> Lexer<'a> {
.unwrap_or_else(|| match text {
"iflags" => Token::Type(types::IFLAGS),
"fflags" => Token::Type(types::FFLAGS),
"sarg__" => Token::Type(types::SARG__),
"sarg_t" => Token::Type(types::SARG_T),
_ => Token::Identifier(text),
}),
loc,
@@ -621,7 +621,7 @@ mod tests {
let mut lex = Lexer::new(
"v0 v00 vx01 block1234567890 block5234567890 v1x vx1 vxvx4 \
function0 function b1 i32x4 f32x5 \
iflags fflags sarg__ iflagss",
iflags fflags sarg_t iflagss",
);
assert_eq!(
lex.next(),
@@ -644,7 +644,7 @@ mod tests {
assert_eq!(lex.next(), token(Token::Identifier("f32x5"), 1));
assert_eq!(lex.next(), token(Token::Type(types::IFLAGS), 1));
assert_eq!(lex.next(), token(Token::Type(types::FFLAGS), 1));
assert_eq!(lex.next(), token(Token::Type(types::SARG__), 1));
assert_eq!(lex.next(), token(Token::Type(types::SARG_T), 1));
assert_eq!(lex.next(), token(Token::Identifier("iflagss"), 1));
assert_eq!(lex.next(), None);
}