x64: fix miscompilation of select.i128 (#4017)

Issue #3963 identified a miscompilation with select in which the second
in the pair of `CMOV`s (one pair per `i128` register) used the wrong
flag. This change fixes the error in the x64 ISLE helper function
emitting these `CMOV` instructions.

cranelift/filetests/filetests/isa/x64/select-i128.clif

@@ -28,3 +28,30 @@ block0(v0: i32, v1: i128, v2: i128):
 ;   Inst 10:   ret
 ; }}
 
+;; Test for issue: https://github.com/bytecodealliance/wasmtime/issues/3963.
+function %f1(f32, i128, i128) -> i128 {
+block0(v0: f32, v1: i128, v2: i128):
+    v3 = fcmp.f32 eq v0, v0
+    v4 = select.i128 v3, v1, v2
+    return v4
+}
+
+; VCode_ShowWithRRU {{
+;   Entry block: 0
+; Block 0:
+;   (original IR block: block0)
+;   (instruction range: 0 .. 12)
+;   Inst 0:   pushq   %rbp
+;   Inst 1:   movq    %rsp, %rbp
+;   Inst 2:   ucomiss %xmm0, %xmm0
+;   Inst 3:   cmovnzq %rdx, %rdi
+;   Inst 4:   cmovpq  %rdx, %rdi
+;   Inst 5:   cmovnzq %rcx, %rsi
+;   Inst 6:   cmovpq  %rcx, %rsi
+;   Inst 7:   movq    %rdi, %rax
+;   Inst 8:   movq    %rsi, %rdx
+;   Inst 9:   movq    %rbp, %rsp
+;   Inst 10:   popq    %rbp
+;   Inst 11:   ret
+; }}
+

cranelift/filetests/filetests/runtests/i128-select.clif

@@ -10,6 +10,15 @@ block0(v0: b1, v1: i128, v2: i128):
 }
 ; run: %i128_select(true, 0, 1) == 0
 ; run: %i128_select(false, 0, 1) == 1
-
 ; run: %i128_select(true, 0x00000000_00000000_DECAFFFF_C0FFEEEE, 0xFFFFFFFF_FFFFFFFF_C0FFEEEE_DECAFFFF) == 0x00000000_00000000_DECAFFFF_C0FFEEEE
 ; run: %i128_select(false, 0x00000000_00000000_DECAFFFF_C0FFEEEE, 0xFFFFFFFF_FFFFFFFF_C0FFEEEE_DECAFFFF) == 0xFFFFFFFF_FFFFFFFF_C0FFEEEE_DECAFFFF
+
+;; Test for issue: https://github.com/bytecodealliance/wasmtime/issues/3963.
+function %i128_fcmp_eq_select(f32, i128, i128) -> i128 {
+block0(v0: f32, v1: i128, v2: i128):
+    v3 = fcmp eq v0, v0
+    v4 = select.i128 v3, v1, v2
+    return v4
+}
+; run: %i128_fcmp_eq_select(0x42.42, 1, 0) == 1
+; run: %i128_fcmp_eq_select(NaN, 1, 0) == 0