diff --git a/cranelift/filetests/isa/intel/binary64-pic.cton b/cranelift/filetests/isa/intel/binary64-pic.cton
index fa422741e4..50a0361ebf 100644
--- a/cranelift/filetests/isa/intel/binary64-pic.cton
+++ b/cranelift/filetests/isa/intel/binary64-pic.cton
@@ -30,11 +30,11 @@ ebb0:
     call fn0()                                  ; bin: e8 PLTRel4(%foo) 00000000
 
     ; asm: mov 0x0(%rip), %rax
-    [-,%rax]            v0 = func_addr.i64 fn0        ; bin: 48 8b 05 GotPCRel4(%foo) 00000000
+    [-,%rax]            v0 = func_addr.i64 fn0        ; bin: 48 8b 05 GOTPCRel4(%foo) 00000000
     ; asm: mov 0x0(%rip), %rsi
-    [-,%rsi]            v1 = func_addr.i64 fn0        ; bin: 48 8b 35 GotPCRel4(%foo) 00000000
+    [-,%rsi]            v1 = func_addr.i64 fn0        ; bin: 48 8b 35 GOTPCRel4(%foo) 00000000
     ; asm: mov 0x0(%rip), %r10
-    [-,%r10]            v2 = func_addr.i64 fn0        ; bin: 4c 8b 15 GotPCRel4(%foo) 00000000
+    [-,%r10]            v2 = func_addr.i64 fn0        ; bin: 4c 8b 15 GOTPCRel4(%foo) 00000000
 
     ; asm: call *%rax
     call_indirect sig0, v0()                  ; bin: ff d0
@@ -44,11 +44,11 @@ ebb0:
     call_indirect sig0, v2()                  ; bin: 41 ff d2
 
     ; asm: mov 0x0(%rip), %rcx
-    [-,%rcx]            v3 = globalsym_addr.i64 gv0    ; bin: 48 8b 0d GotPCRel4(%some_gv) 00000000
+    [-,%rcx]            v3 = globalsym_addr.i64 gv0    ; bin: 48 8b 0d GOTPCRel4(%some_gv) 00000000
     ; asm: mov 0x0(%rip), %rsi
-    [-,%rsi]            v4 = globalsym_addr.i64 gv0    ; bin: 48 8b 35 GotPCRel4(%some_gv) 00000000
+    [-,%rsi]            v4 = globalsym_addr.i64 gv0    ; bin: 48 8b 35 GOTPCRel4(%some_gv) 00000000
     ; asm: mov 0x0(%rip), %r10
-    [-,%r10]            v5 = globalsym_addr.i64 gv0    ; bin: 4c 8b 15 GotPCRel4(%some_gv) 00000000
+    [-,%r10]            v5 = globalsym_addr.i64 gv0    ; bin: 4c 8b 15 GOTPCRel4(%some_gv) 00000000
 
     return
 }
diff --git a/lib/cretonne/meta/isa/intel/recipes.py b/lib/cretonne/meta/isa/intel/recipes.py
index 947d5839e7..0ed5431e8d 100644
--- a/lib/cretonne/meta/isa/intel/recipes.py
+++ b/lib/cretonne/meta/isa/intel/recipes.py
@@ -565,7 +565,7 @@ got_fnaddr8 = TailRecipe(
         emit='''
         PUT_OP(bits, rex2(0, out_reg0), sink);
         modrm_riprel(out_reg0, sink);
-        sink.reloc_external(Reloc::IntelGotPCRel4,
+        sink.reloc_external(Reloc::IntelGOTPCRel4,
                             &func.dfg.ext_funcs[func_ref].name);
         sink.put4(0);
         ''')
@@ -597,7 +597,7 @@ got_gvaddr8 = TailRecipe(
         emit='''
         PUT_OP(bits, rex2(0, out_reg0), sink);
         modrm_rm(5, out_reg0, sink);
-        sink.reloc_external(Reloc::IntelGotPCRel4,
+        sink.reloc_external(Reloc::IntelGOTPCRel4,
                             &func.global_vars[global_var].symbol_name());
         sink.put4(0);
         ''')
diff --git a/lib/cretonne/src/binemit/mod.rs b/lib/cretonne/src/binemit/mod.rs
index 43665d945b..9814b2727f 100644
--- a/lib/cretonne/src/binemit/mod.rs
+++ b/lib/cretonne/src/binemit/mod.rs
@@ -29,7 +29,7 @@ pub enum Reloc {
     /// Intel absolute 8-byte
     IntelAbs8,
     /// Intel GOT PC-relative 4-byte
-    IntelGotPCRel4,
+    IntelGOTPCRel4,
     /// Intel PLT-relative 4-byte
     IntelPLTRel4,
     /// Arm32 call target
@@ -48,7 +48,7 @@ impl fmt::Display for Reloc {
             Reloc::IntelPCRel4 => write!(f, "{}", "PCRel4"),
             Reloc::IntelAbs4 => write!(f, "{}", "Abs4"),
             Reloc::IntelAbs8 => write!(f, "{}", "Abs8"),
-            Reloc::IntelGotPCRel4 => write!(f, "{}", "GotPCRel4"),
+            Reloc::IntelGOTPCRel4 => write!(f, "{}", "GOTPCRel4"),
             Reloc::IntelPLTRel4 => write!(f, "{}", "PLTRel4"),
             Reloc::Arm32Call | Reloc::Arm64Call | Reloc::RiscvCall => write!(f, "{}", "Call"),
         }