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Narrow allow(dead_code) declarations (#4116)

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* Narrow `allow(dead_code)` declarations

Having module wide `allow(dead_code)` may hide some code that's really
dead. In this commit I just narrowed the declarations to the specific
enum variants that were not used (as it seems reasonable to keep them
and their handling in all the matches, for future use). And the compiler
found more dead code that I think we can remove safely in the short
term.

With this, the only files annotated with a module-wide
`allow(dead_code)` are isle-generated files.

* resurrect some functions as test helpers
This commit is contained in:
Benjamin Bouvier
2022-05-10 12:02:52 +02:00
committed by GitHub
parent 2af8d1e93c
commit 71fc16bbeb
10 changed files with 53 additions and 198 deletions
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3
cranelift/codegen/src/isa/s390x/inst/args.rs
View File

@@ -1,8 +1,5 @@
//! S390x ISA definitions: instruction arguments.
// Some variants are never constructed, but we still want them as options in the future.
#![allow(dead_code)]
use crate::ir::condcodes::{FloatCC, IntCC};
use crate::ir::MemFlags;
use crate::isa::s390x::inst::*;

33
cranelift/codegen/src/isa/s390x/inst/emit_tests.rs
View File

@@ -4,6 +4,11 @@ use crate::isa::s390x::settings as s390x_settings;
use crate::settings;
use alloc::vec::Vec;
#[cfg(test)]
fn simm20_zero() -> SImm20 {
SImm20::maybe_from_i64(0).unwrap()
}
#[test]
fn test_s390x_binemit() {
let mut insns = Vec::<(Inst, &str, &str)>::new();
@@ -498,7 +503,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -512,7 +517,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -582,7 +587,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -652,7 +657,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -666,7 +671,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -736,7 +741,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -806,7 +811,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -820,7 +825,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -890,7 +895,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -932,7 +937,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -974,7 +979,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -1573,7 +1578,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -1612,7 +1617,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},
@@ -1726,7 +1731,7 @@ fn test_s390x_binemit() {
mem: MemArg::BXD20 {
base: gpr(2),
index: zero_reg(),
disp: SImm20::zero(),
disp: simm20_zero(),
flags: MemFlags::trusted(),
},
},

29
cranelift/codegen/src/isa/s390x/inst/imms.rs
View File

@@ -56,11 +56,6 @@ impl SImm20 {
}
}
/// Create a zero immediate of this format.
pub fn zero() -> SImm20 {
SImm20 { value: 0 }
}
/// Bits for encoding.
pub fn bits(&self) -> u32 {
let encoded: u32 = self.value as u32;
@@ -130,11 +125,6 @@ impl UImm16Shifted {
shift: self.shift,
}
}
/// Returns the value that this constant represents.
pub fn value(&self) -> u64 {
(self.bits as u64) << (16 * self.shift)
}
}
/// A 32-bit immediate with a {0,32}-bit shift.
@@ -179,31 +169,12 @@ impl UImm32Shifted {
}
}
pub fn from_uimm16shifted(value: UImm16Shifted) -> UImm32Shifted {
if value.shift % 2 == 0 {
UImm32Shifted {
bits: value.bits as u32,
shift: value.shift / 2,
}
} else {
UImm32Shifted {
bits: (value.bits as u32) << 16,
shift: value.shift / 2,
}
}
}
pub fn negate_bits(&self) -> UImm32Shifted {
UImm32Shifted {
bits: !self.bits,
shift: self.shift,
}
}
/// Returns the value that this constant represents.
pub fn value(&self) -> u64 {
(self.bits as u64) << (32 * self.shift)
}
}
impl PrettyPrint for UImm12 {

4
cranelift/codegen/src/isa/s390x/inst/mod.rs
View File

@@ -1,8 +1,5 @@
//! This module defines s390x-specific machine instruction types.
// Some variants are not constructed, but we still want them as options in the future.
#![allow(dead_code)]
use crate::binemit::{Addend, CodeOffset, Reloc};
use crate::ir::{types, ExternalName, Opcode, Type};
use crate::machinst::*;
@@ -2019,6 +2016,7 @@ impl Inst {
/// Different forms of label references for different instruction formats.
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum LabelUse {
#[allow(dead_code)]
/// RI-format branch. 16-bit signed offset. PC-relative, offset is imm << 1.
BranchRI,
/// RIL-format branch. 32-bit signed offset. PC-relative, offset is imm << 1.

20
cranelift/codegen/src/isa/s390x/inst/regs.rs
View File

@@ -11,26 +11,6 @@ use crate::settings;
//=============================================================================
// Registers, the Universe thereof, and printing
#[rustfmt::skip]
const GPR_INDICES: [u8; 16] = [
// r0 and r1 reserved
30, 31,
// r2 - r5 call-clobbered
16, 17, 18, 19,
// r6 - r14 call-saved (order reversed)
28, 27, 26, 25, 24, 23, 22, 21, 20,
// r15 (SP)
29,
];
#[rustfmt::skip]
const FPR_INDICES: [u8; 16] = [
// f0 - f7 as pairs
0, 4, 1, 5, 2, 6, 3, 7,
// f8 - f15 as pairs
8, 12, 9, 13, 10, 14, 11, 15,
];
/// Get a reference to a GPR (integer register).
pub fn gpr(num: u8) -> Reg {
assert!(num < 16);