diff --git a/cranelift/codegen/meta-python/base/legalize.py b/cranelift/codegen/meta-python/base/legalize.py
index 423309dab7..96cb355461 100644
--- a/cranelift/codegen/meta-python/base/legalize.py
+++ b/cranelift/codegen/meta-python/base/legalize.py
@@ -261,6 +261,23 @@ for binop in [iadd_imm, imul_imm, udiv_imm, urem_imm]:
 for binop in [sdiv_imm, srem_imm]:
     widen_imm(True, binop)
 
+# Use expand instead of widen, because widen only gets applied for i8 and i16
+# base type vars, but these take f32 and f64 as base type var.
+for ty in [types.f32, types.f64]:
+    for int_ty in [types.i8, types.i16]:
+        expand.legalize(
+            a << insts.fcvt_from_uint.bind(ty).bind(int_ty)(b),
+            Rtl(
+                x << uextend.i32(b),
+                a << insts.fcvt_from_uint.bind(ty).i32(x),
+            ))
+        expand.legalize(
+            a << insts.fcvt_from_sint.bind(ty).bind(int_ty)(b),
+            Rtl(
+                x << sextend.i32(b),
+                a << insts.fcvt_from_sint.bind(ty).i32(x),
+            ))
+
 widen_imm(False, irsub_imm)
 
 # bit ops
diff --git a/cranelift/filetests/filetests/isa/x86/legalize-fcvt_from_usint-i16.clif b/cranelift/filetests/filetests/isa/x86/legalize-fcvt_from_usint-i16.clif
new file mode 100644
index 0000000000..b7d4b80977
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x86/legalize-fcvt_from_usint-i16.clif
@@ -0,0 +1,14 @@
+test compile
+target x86_64
+
+function u0:0(i16) -> f64 fast {
+ebb0(v0: i16):
+    v1 = fcvt_from_uint.f64 v0
+    return v1
+}
+
+function u0:1(i16) -> f64 fast {
+ebb0(v0: i16):
+    v1 = fcvt_from_sint.f64 v0
+    return v1
+}