Fix AArch64 ABI to respect half-caller-save, half-callee-save vec regs.

This PR updates the AArch64 ABI implementation so that it (i) properly
respects that v8-v15 inclusive have callee-save lower halves, and
caller-save upper halves, by conservatively approximating (to full
registers) in the appropriate directions when generating prologue
caller-saves and when informing the regalloc of clobbered regs across
callsites.

In order to prevent saving all of these vector registers in the prologue
of every non-leaf function due to the above approximation, this also
makes use of a new regalloc.rs feature to exclude call instructions'
writes from the clobber set returned by register allocation. This is
safe whenever the caller and callee have the same ABI (because anything
the callee could clobber, the caller is allowed to clobber as well
without saving it in the prologue).

Fixes #2254.

cranelift/codegen/src/isa/aarch64/inst/imms.rs

@@ -5,9 +5,8 @@
 use crate::ir::types::*;
 use crate::ir::Type;
 use crate::isa::aarch64::inst::OperandSize;
-use crate::machinst::*;
 
-use regalloc::RealRegUniverse;
+use regalloc::{PrettyPrint, RealRegUniverse};
 
 use core::convert::TryFrom;
 use std::string::String;
@@ -668,7 +667,7 @@ impl MoveWideConst {
     }
 }
 
-impl ShowWithRRU for NZCV {
+impl PrettyPrint for NZCV {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         let fmt = |c: char, v| if v { c.to_ascii_uppercase() } else { c };
         format!(
@@ -681,13 +680,13 @@ impl ShowWithRRU for NZCV {
     }
 }
 
-impl ShowWithRRU for UImm5 {
+impl PrettyPrint for UImm5 {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.value)
     }
 }
 
-impl ShowWithRRU for Imm12 {
+impl PrettyPrint for Imm12 {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         let shift = if self.shift12 { 12 } else { 0 };
         let value = u32::from(self.bits) << shift;
@@ -695,49 +694,49 @@ impl ShowWithRRU for Imm12 {
     }
 }
 
-impl ShowWithRRU for SImm7Scaled {
+impl PrettyPrint for SImm7Scaled {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.value)
     }
 }
 
-impl ShowWithRRU for FPULeftShiftImm {
+impl PrettyPrint for FPULeftShiftImm {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.amount)
     }
 }
 
-impl ShowWithRRU for FPURightShiftImm {
+impl PrettyPrint for FPURightShiftImm {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.amount)
     }
 }
 
-impl ShowWithRRU for SImm9 {
+impl PrettyPrint for SImm9 {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.value)
     }
 }
 
-impl ShowWithRRU for UImm12Scaled {
+impl PrettyPrint for UImm12Scaled {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.value)
     }
 }
 
-impl ShowWithRRU for ImmLogic {
+impl PrettyPrint for ImmLogic {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.value())
     }
 }
 
-impl ShowWithRRU for ImmShift {
+impl PrettyPrint for ImmShift {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         format!("#{}", self.imm)
     }
 }
 
-impl ShowWithRRU for MoveWideConst {
+impl PrettyPrint for MoveWideConst {
     fn show_rru(&self, _mb_rru: Option<&RealRegUniverse>) -> String {
         if self.shift == 0 {
             format!("#{}", self.bits)