AArch64 SIMD: pattern-match load+splat into LD1R instruction.

cranelift/codegen/src/machinst/inst_common.rs

@@ -1,6 +1,8 @@
 //! A place to park MachInst::Inst fragments which are common across multiple architectures.
 
+use super::{LowerCtx, VCodeInst};
 use crate::ir::{self, Inst as IRInst};
+use smallvec::SmallVec;
 
 //============================================================================
 // Instruction input "slots".
@@ -22,6 +24,24 @@ pub(crate) struct InsnOutput {
     pub(crate) output: usize,
 }
 
+pub(crate) fn insn_inputs<I: VCodeInst, C: LowerCtx<I = I>>(
+    ctx: &C,
+    insn: IRInst,
+) -> SmallVec<[InsnInput; 4]> {
+    (0..ctx.num_inputs(insn))
+        .map(|i| InsnInput { insn, input: i })
+        .collect()
+}
+
+pub(crate) fn insn_outputs<I: VCodeInst, C: LowerCtx<I = I>>(
+    ctx: &C,
+    insn: IRInst,
+) -> SmallVec<[InsnOutput; 4]> {
+    (0..ctx.num_outputs(insn))
+        .map(|i| InsnOutput { insn, output: i })
+        .collect()
+}
+
 //============================================================================
 // Atomic instructions.
 

cranelift/codegen/src/machinst/lower.rs

@@ -147,9 +147,10 @@ pub trait LowerCtx {
     /// Emit a machine instruction that is a safepoint.
     fn emit_safepoint(&mut self, mach_inst: Self::I);
     /// Indicate that the side-effect of an instruction has been sunk to the
-    /// current scan location. This can only be done to an instruction with no
-    /// uses of its result register(s), because it will cause the instruction
-    /// not to be codegen'd at its original location.
+    /// current scan location. This should only be done with the instruction's
+    /// original results are not used (i.e., `put_input_in_reg` is not invoked
+    /// for the input produced by the sunk instruction), otherwise the
+    /// side-effect will occur twice.
     fn sink_inst(&mut self, ir_inst: Inst);
     /// Retrieve constant data given a handle.
     fn get_constant_data(&self, constant_handle: Constant) -> &ConstantData;