[meta] Make Builders build() instead of finish();

cranelift/codegen/meta/src/isa/arm32/mod.rs

@@ -8,7 +8,7 @@ use crate::shared::Definitions as SharedDefinitions;
 
 fn define_settings(_shared: &SettingGroup) -> SettingGroup {
     let setting = SettingGroupBuilder::new("arm32");
-    setting.finish()
+    setting.build()
 }
 
 fn define_regs() -> IsaRegs {
@@ -45,7 +45,7 @@ fn define_regs() -> IsaRegs {
     let builder = RegClassBuilder::new_toplevel("FLAG", flag_reg);
     regs.add_class(builder);
 
-    regs.finish()
+    regs.build()
 }
 
 pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
@@ -57,7 +57,7 @@ pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
         "arm32 specific instruction set",
         &shared_defs.format_registry,
     )
-    .finish();
+    .build();
 
     // CPU modes for 32-bit ARM and Thumb2.
     let mut a32 = CpuMode::new("A32");

cranelift/codegen/meta/src/isa/arm64/mod.rs

@@ -8,7 +8,7 @@ use crate::shared::Definitions as SharedDefinitions;
 
 fn define_settings(_shared: &SettingGroup) -> SettingGroup {
     let setting = SettingGroupBuilder::new("arm64");
-    setting.finish()
+    setting.build()
 }
 
 fn define_registers() -> IsaRegs {
@@ -41,7 +41,7 @@ fn define_registers() -> IsaRegs {
     let builder = RegClassBuilder::new_toplevel("FLAG", flag_reg);
     regs.add_class(builder);
 
-    regs.finish()
+    regs.build()
 }
 
 pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
@@ -53,7 +53,7 @@ pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
         "arm64 specific instruction set",
         &shared_defs.format_registry,
     )
-    .finish();
+    .build();
 
     let mut a64 = CpuMode::new("A64");
 

cranelift/codegen/meta/src/isa/riscv/mod.rs

@@ -57,7 +57,7 @@ fn define_settings(shared: &SettingGroup) -> SettingGroup {
         predicate!(shared_enable_simd && supports_f && supports_d),
     );
 
-    setting.finish()
+    setting.build()
 }
 
 fn define_registers() -> IsaRegs {
@@ -79,7 +79,7 @@ fn define_registers() -> IsaRegs {
     let builder = RegClassBuilder::new_toplevel("FPR", float_regs);
     regs.add_class(builder);
 
-    regs.finish()
+    regs.build()
 }
 
 pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
@@ -91,7 +91,7 @@ pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
         "riscv specific instruction set",
         &shared_defs.format_registry,
     )
-    .finish();
+    .build();
 
     // CPU modes for 32-bit and 64-bit operation.
     let mut rv_32 = CpuMode::new("RV32");

cranelift/codegen/meta/src/isa/x86/instructions.rs

@@ -18,7 +18,7 @@ pub fn define(format_registry: &FormatRegistry) -> InstructionGroup {
     let iWord = &TypeVar::new(
         "iWord",
         "A scalar integer machine word",
-        TypeSetBuilder::new().ints(32..64).finish(),
+        TypeSetBuilder::new().ints(32..64).build(),
     );
     let nlo = &operand_doc("nlo", iWord, "Low part of numerator");
     let nhi = &operand_doc("nhi", iWord, "High part of numerator");
@@ -103,7 +103,7 @@ pub fn define(format_registry: &FormatRegistry) -> InstructionGroup {
         TypeSetBuilder::new()
             .floats(Interval::All)
             .simd_lanes(Interval::All)
-            .finish(),
+            .build(),
     );
     let IntTo = &TypeVar::new(
         "IntTo",
@@ -111,7 +111,7 @@ pub fn define(format_registry: &FormatRegistry) -> InstructionGroup {
         TypeSetBuilder::new()
             .ints(32..64)
             .simd_lanes(Interval::All)
-            .finish(),
+            .build(),
     );
     let x = &operand("x", Float);
     let a = &operand("a", IntTo);
@@ -242,5 +242,5 @@ pub fn define(format_registry: &FormatRegistry) -> InstructionGroup {
         .operands_out(vec![y, rflags]),
     );
 
-    ig.finish()
+    ig.build()
 }

cranelift/codegen/meta/src/isa/x86/legalize.rs

@@ -289,5 +289,5 @@ pub fn define(shared: &mut SharedDefinitions, x86_instructions: &InstructionGrou
         ],
     );
 
-    group.finish_and_add_to(&mut shared.transform_groups);
+    group.build_and_add_to(&mut shared.transform_groups);
 }

cranelift/codegen/meta/src/isa/x86/registers.rs

@@ -38,5 +38,5 @@ pub fn define() -> IsaRegs {
     let builder = RegClassBuilder::subclass_of("FPR8", fpr, 0, 8);
     regs.add_class(builder);
 
-    regs.finish()
+    regs.build()
 }

cranelift/codegen/meta/src/isa/x86/settings.rs

@@ -83,5 +83,5 @@ pub fn define(shared: &SettingGroup) -> SettingGroup {
         ),
     );
 
-    settings.finish()
+    settings.build()
 }