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Fix SIMD float comparison encoding (#1285)

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The Intel manual uses `CMPNLT` and `CMPNLE` to denote not-less-than and not-less-than-or-equals. These were translated previously to `FloatCC::GreaterThan` and `FloatCC::GreaterThanOrEqual` but should be correctly translated to `FloatCC::UnorderedOrGreaterThanOrEqual` and `FloatCC::UnorderedOrGreaterThan`. This change adds the necessary legalizations to make use of these new encodings.
This commit is contained in:
Andrew Brown
2020-01-08 09:28:05 -08:00
committed by GitHub
parent 8ff6d640d6
commit 6fe86bcb61
4 changed files with 47 additions and 13 deletions
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8
cranelift/filetests/filetests/isa/x86/simd-comparison-binemit.clif
View File

@@ -60,8 +60,8 @@ ebb0(v0: f32x4 [%xmm2], v1: f32x4 [%xmm4]):
[-, %xmm2] v4 = fcmp le v0, v1 ; bin: 40 0f c2 d4 02
[-, %xmm2] v5 = fcmp uno v0, v1 ; bin: 40 0f c2 d4 03
[-, %xmm2] v6 = fcmp ne v0, v1 ; bin: 40 0f c2 d4 04
[-, %xmm2] v7 = fcmp ge v0, v1 ; bin: 40 0f c2 d4 05
[-, %xmm2] v8 = fcmp gt v0, v1 ; bin: 40 0f c2 d4 06
[-, %xmm2] v7 = fcmp uge v0, v1 ; bin: 40 0f c2 d4 05
[-, %xmm2] v8 = fcmp ugt v0, v1 ; bin: 40 0f c2 d4 06
[-, %xmm2] v9 = fcmp ord v0, v1 ; bin: 40 0f c2 d4 07
return
}
@@ -73,8 +73,8 @@ ebb0(v0: f64x2 [%xmm2], v1: f64x2 [%xmm0]):
[-, %xmm2] v4 = fcmp le v0, v1 ; bin: 66 40 0f c2 d0 02
[-, %xmm2] v5 = fcmp uno v0, v1 ; bin: 66 40 0f c2 d0 03
[-, %xmm2] v6 = fcmp ne v0, v1 ; bin: 66 40 0f c2 d0 04
[-, %xmm2] v7 = fcmp ge v0, v1 ; bin: 66 40 0f c2 d0 05
[-, %xmm2] v8 = fcmp gt v0, v1 ; bin: 66 40 0f c2 d0 06
[-, %xmm2] v7 = fcmp uge v0, v1 ; bin: 66 40 0f c2 d0 05
[-, %xmm2] v8 = fcmp ugt v0, v1 ; bin: 66 40 0f c2 d0 06
[-, %xmm2] v9 = fcmp ord v0, v1 ; bin: 66 40 0f c2 d0 07
return
}

14
cranelift/filetests/filetests/isa/x86/simd-comparison-run.clif
View File

@@ -231,3 +231,17 @@ ebb0:
return v8
}
; run
function %fcmp_gt_nans_f32x4() -> b1 {
ebb0:
v0 = vconst.f32x4 [NaN 0x42.0 -NaN NaN]
v1 = vconst.f32x4 [NaN NaN 0x42.0 Inf]
v2 = fcmp gt v0, v1
; now check that the result v2 is all zeroes
v3 = vconst.i32x4 0x00
v4 = raw_bitcast.i32x4 v2
v5 = icmp eq v3, v4
v8 = vall_true v5
return v8
}
; run