Adds support for legalizing CLZ, CTZ and POPCOUNT on baseline x86_64 targets.

Changes:

* Adds a new generic instruction, SELECTIF, that does value selection (a la
  conditional move) similarly to existing SELECT, except that it is
  controlled by condition code input and flags-register inputs.

* Adds a new Intel x86_64 variant, 'baseline', that supports SSE2 and
  nothing else.

* Adds new Intel x86_64 instructions BSR and BSF.

* Implements generic CLZ, CTZ and POPCOUNT on x86_64 'baseline' targets
  using the new BSR, BSF and SELECTIF instructions.

* Implements SELECTIF on x86_64 targets using conditional-moves.

* new test filetests/isa/intel/baseline_clz_ctz_popcount.cton
  (for legalization)

* new test filetests/isa/intel/baseline_clz_ctz_popcount_encoding.cton
  (for encoding)

* Allow lib/cretonne/meta/gen_legalizer.py to generate non-snake-caseified
  Rust without rustc complaining.

Fixes #238.
This commit is contained in:
Julian Seward
2018-01-17 06:23:30 +01:00
committed by Jakob Stoklund Olesen
parent e3714ddd10
commit 6f8a54b6a5
16 changed files with 440 additions and 3 deletions

View File

@@ -42,7 +42,7 @@ ebb0:
; nextln: $v3 = bxor v0, v2
; nextln: }
; Polymorphic istruction controlled by second operand.
; Polymorphic instruction controlled by second operand.
function %select() {
ebb0(v90: i32, v91: i32, v92: b1):
v0 = select v92, v90, v91
@@ -52,6 +52,16 @@ ebb0(v90: i32, v91: i32, v92: b1):
; nextln: $v0 = select $v92, $v90, $v91
; nextln: }
; Polymorphic instruction controlled by third operand.
function %selectif() native {
ebb0(v95: i32, v96: i32, v97: b1):
v98 = selectif.i32 eq v97, v95, v96
}
; sameln: function %selectif() native {
; nextln: ebb0(v0: i32, v1: i32, v2: b1):
; nextln: v3 = selectif.i32 eq v2, v0, v1
; nextln: }
; Lane indexes.
function %lanes() {
ebb0: