s390x: Improved TrapIf implementation (#6079)

Following up on the discussion in
https://github.com/bytecodealliance/wasmtime/pull/6011
this adds an improved implementation of TrapIf for s390x
using a single conditional branch instruction.

If the trap conditions is true, we branch into the middle of
the branch instruction - those middle two bytes are zero,
which matches the encoding of the trap instruction.

In addition, show the trap code for Trap and TrapIf
instructions in assembler output.
This commit is contained in:
Ulrich Weigand
2023-03-23 15:50:43 +01:00
committed by GitHub
parent a6925c21c5
commit 6f66abd5c7
64 changed files with 357 additions and 451 deletions

View File

@@ -3185,11 +3185,13 @@ impl Inst {
let cond = cond.pretty_print_default();
format!("jg{} {}", cond, target)
}
&Inst::Debugtrap => "debugtrap".to_string(),
&Inst::Trap { .. } => "trap".to_string(),
&Inst::TrapIf { cond, .. } => {
let cond = cond.invert().pretty_print_default();
format!("j{} 6 ; trap", cond)
&Inst::Debugtrap => ".word 0x0001 # debugtrap".to_string(),
&Inst::Trap { trap_code } => {
format!(".word 0x0000 # trap={}", trap_code)
}
&Inst::TrapIf { cond, trap_code } => {
let cond = cond.pretty_print_default();
format!("jg{} .+2 # trap={}", cond, trap_code)
}
&Inst::JTSequence { ridx, ref targets } => {
let ridx = pretty_print_reg(ridx, allocs);