diff --git a/docs/metaref.rst b/docs/metaref.rst index 4699a80a43..a073ed5ad8 100644 --- a/docs/metaref.rst +++ b/docs/metaref.rst @@ -137,7 +137,7 @@ indicated with an instance of :class:`ImmediateKind`. .. autoclass:: ImmediateKind -.. automodule:: cretonne.immediates +.. automodule:: base.immediates :members: Entity references @@ -149,7 +149,7 @@ can be extended basic blocks, or entities declared in the function preamble. .. currentmodule:: cdsl.operands .. autoclass:: EntityRefKind -.. automodule:: cretonne.entities +.. automodule:: base.entities :members: Value types diff --git a/lib/cretonne/meta/cretonne/entities.py b/lib/cretonne/meta/base/entities.py similarity index 100% rename from lib/cretonne/meta/cretonne/entities.py rename to lib/cretonne/meta/base/entities.py diff --git a/lib/cretonne/meta/cretonne/formats.py b/lib/cretonne/meta/base/formats.py similarity index 98% rename from lib/cretonne/meta/cretonne/formats.py rename to lib/cretonne/meta/base/formats.py index a4d012020d..49300c2ed0 100644 --- a/lib/cretonne/meta/cretonne/formats.py +++ b/lib/cretonne/meta/base/formats.py @@ -7,7 +7,7 @@ in this module. """ from __future__ import absolute_import from cdsl.operands import VALUE, VARIABLE_ARGS -from . import InstructionFormat +from cretonne import InstructionFormat from .immediates import imm64, uimm8, ieee32, ieee64, immvector, intcc, floatcc from .entities import ebb, sig_ref, func_ref, jump_table diff --git a/lib/cretonne/meta/cretonne/immediates.py b/lib/cretonne/meta/base/immediates.py similarity index 100% rename from lib/cretonne/meta/cretonne/immediates.py rename to lib/cretonne/meta/base/immediates.py diff --git a/lib/cretonne/meta/cretonne/__init__.py b/lib/cretonne/meta/cretonne/__init__.py index d6b9835443..2429136143 100644 --- a/lib/cretonne/meta/cretonne/__init__.py +++ b/lib/cretonne/meta/cretonne/__init__.py @@ -732,4 +732,4 @@ class Encoding(object): # Import the fixed instruction formats now so they can be added to the # registry. -importlib.import_module('cretonne.formats') +importlib.import_module('base.formats') diff --git a/lib/cretonne/meta/cretonne/base.py b/lib/cretonne/meta/cretonne/base.py index e2ceadaff4..6ecbdcf86d 100644 --- a/lib/cretonne/meta/cretonne/base.py +++ b/lib/cretonne/meta/cretonne/base.py @@ -9,8 +9,9 @@ from cdsl.operands import VARIABLE_ARGS from . import Operand, Instruction, InstructionGroup from .typevar import TypeVar from base.types import i8, f32, f64, b1 -from .immediates import imm64, uimm8, ieee32, ieee64, immvector, intcc, floatcc -from . import entities +from base.immediates import imm64, uimm8, ieee32, ieee64, immvector +from base.immediates import intcc, floatcc +from base import entities instructions = InstructionGroup("base", "Shared base instruction set") diff --git a/lib/cretonne/meta/isa/riscv/recipes.py b/lib/cretonne/meta/isa/riscv/recipes.py index 5818bd3fd9..b4f561f8e2 100644 --- a/lib/cretonne/meta/isa/riscv/recipes.py +++ b/lib/cretonne/meta/isa/riscv/recipes.py @@ -10,8 +10,8 @@ instruction formats described in the reference: """ from __future__ import absolute_import from cretonne import EncRecipe -from cretonne.formats import Binary, BinaryImm from cdsl.predicates import IsSignedInt +from base.formats import Binary, BinaryImm # The low 7 bits of a RISC-V instruction is the base opcode. All 32-bit # instructions have 11 as the two low bits, with bits 6:2 determining the base