CSSA verifier.

During register allocation, the code must be kept in conventional SSA
form. Add a verifier that checks this property.

lib/cretonne/src/regalloc/virtregs.rs

@@ -12,11 +12,12 @@
 //! memory-to-memory copies when a spilled value is passed as an EBB argument.
 
 use entity_list::{EntityList, ListPool};
-use entity_map::{EntityMap, PrimaryEntityData};
+use entity_map::{EntityMap, PrimaryEntityData, Keys};
 use ir::Value;
 use packed_option::PackedOption;
 use ref_slice::ref_slice;
 
+/// A virtual register reference.
 #[derive(Copy, Clone, PartialEq, Eq, Hash, Debug, PartialOrd, Ord)]
 pub struct VirtReg(u32);
 entity_impl!(VirtReg, "vreg");
@@ -71,6 +72,11 @@ impl VirtRegs {
         self.vregs[vreg].as_slice(&self.pool)
     }
 
+    /// Get an iterator over all virtual registers.
+    pub fn all_virtregs(&self) -> Keys<VirtReg> {
+        self.vregs.keys()
+    }
+
     /// Get the congruence class of `value`.
     ///
     /// If `value` belongs to a virtual register, the congruence class is the values of the virtual