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Cranelift: Use a single, shared vector allocation for all ABIArgs (#5127)

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* Cranelift: Use a single, shared vector allocation for all `ABIArg`s

Instead of two `SmallVec`s per `SigData`.

* Remove `Deref` and `DerefMut` impls for `ArgsAccumulator`
This commit is contained in:
Nick Fitzgerald
2022-10-31 14:32:17 -07:00
committed by GitHub
parent 04fa8951ba
commit 6d289723bd
7 changed files with 190 additions and 99 deletions
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16
cranelift/codegen/src/isa/riscv64/abi.rs
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@@ -62,7 +62,8 @@ impl ABIMachineSpec for Riscv64MachineDeps {
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
mut args: ArgsAccumulator<'_>,
) -> CodegenResult<(i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>,
{
@@ -78,7 +79,6 @@ impl ABIMachineSpec for Riscv64MachineDeps {
let mut next_f_reg = f_start;
// Stack space.
let mut next_stack: u64 = 0;
let mut ret = smallvec![];
let mut return_one_register_used = false;
for param in params {
@@ -86,7 +86,7 @@ impl ABIMachineSpec for Riscv64MachineDeps {
let offset = next_stack;
assert!(size % 8 == 0, "StructArgument size is not properly aligned");
next_stack += size as u64;
ret.push(ABIArg::StructArg {
args.push(ABIArg::StructArg {
pointer: None,
offset: offset as i64,
size: size as u64,
@@ -152,7 +152,7 @@ impl ABIMachineSpec for Riscv64MachineDeps {
next_stack += size;
}
}
ret.push(ABIArg::Slots {
args.push(ABIArg::Slots {
slots,
purpose: param.purpose,
});
@@ -166,7 +166,7 @@ impl ABIMachineSpec for Riscv64MachineDeps {
ir::ArgumentExtension::None,
ir::ArgumentPurpose::Normal,
);
ret.push(arg);
args.push(arg);
} else {
let arg = ABIArg::stack(
next_stack as i64,
@@ -174,10 +174,10 @@ impl ABIMachineSpec for Riscv64MachineDeps {
ir::ArgumentExtension::None,
ir::ArgumentPurpose::Normal,
);
ret.push(arg);
args.push(arg);
next_stack += 8;
}
Some(ret.len() - 1)
Some(args.args().len() - 1)
} else {
None
};
@@ -187,7 +187,7 @@ impl ABIMachineSpec for Riscv64MachineDeps {
if next_stack > STACK_ARG_RET_SIZE_LIMIT {
return Err(CodegenError::ImplLimitExceeded);
}
CodegenResult::Ok((ret, next_stack as i64, pos))
CodegenResult::Ok((next_stack as i64, pos))
}
fn fp_to_arg_offset(_call_conv: isa::CallConv, _flags: &settings::Flags) -> i64 {