Enable the simd_conversions test for AArch64

2021-06-02 19:54:34 +01:00
parent ff1ae6e10c
commit 6c3d7092b9
5 changed files with 97 additions and 8 deletions
--- a/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
@@ -2611,6 +2611,28 @@ fn test_aarch64_binemit() {
        "uqxtn2 v11.4s, v12.2d",
    ));

+    insns.push((
+        Inst::VecRRNarrow {
+            op: VecRRNarrowOp::Fcvtn32,
+            rd: writable_vreg(0),
+            rn: vreg(0),
+            high_half: false,
+        },
+        "0068210E",
+        "fcvtn v0.4h, v0.4s",
+    ));
+
+    insns.push((
+        Inst::VecRRNarrow {
+            op: VecRRNarrowOp::Fcvtn64,
+            rd: writable_vreg(31),
+            rn: vreg(30),
+            high_half: true,
+        },
+        "DF6B614E",
+        "fcvtn2 v31.4s, v30.2d",
+    ));
+
    insns.push((
        Inst::VecRRPair {
            op: VecPairOp::Addp,