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Enable the simd_conversions test for AArch64

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Copyright (c) 2021, Arm Limited.
This commit is contained in:
Anton Kirilov
2021-06-02 19:54:34 +01:00
parent ff1ae6e10c
commit 6c3d7092b9
5 changed files with 97 additions and 8 deletions
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cranelift/codegen/src/isa/aarch64/inst/emit.rs
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@@ -2128,6 +2128,8 @@ impl MachInstEmit for Inst {
VecRRNarrowOp::Uqxtn16 => (0b1, 0b00, 0b10100),
VecRRNarrowOp::Uqxtn32 => (0b1, 0b01, 0b10100),
VecRRNarrowOp::Uqxtn64 => (0b1, 0b10, 0b10100),
VecRRNarrowOp::Fcvtn32 => (0b0, 0b00, 0b10110),
VecRRNarrowOp::Fcvtn64 => (0b0, 0b01, 0b10110),
};
sink.put4(enc_vec_rr_misc(