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Intel encodings for nearest/floor/ceil/trunc.

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These floating point rounding operations all use the roundss/roundsd
instructions that are available in SSE 4.1.
This commit is contained in:
Jakob Stoklund Olesen
2017-09-25 14:57:01 -07:00
parent ac343ba92a
commit 6bec5f8507
8 changed files with 216 additions and 14 deletions
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56
cranelift/filetests/isa/intel/binary64-float.cton
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@@ -98,6 +98,34 @@ ebb0:
; asm: sqrtss %xmm10, %xmm5
[-,%xmm5] v51 = sqrt v11 ; bin: f3 41 0f 51 ea
; asm: roundss $0, %xmm5, %xmm10
[-,%xmm10] v52 = nearest v10 ; bin: 66 44 0f 3a 0a d5 00
; asm: roundss $0, %xmm10, %xmm5
[-,%xmm5] v53 = nearest v11 ; bin: 66 41 0f 3a 0a ea 00
; asm: roundss $0, %xmm5, %xmm2
[-,%xmm2] v54 = nearest v10 ; bin: 66 0f 3a 0a d5 00
; asm: roundss $1, %xmm5, %xmm10
[-,%xmm10] v55 = floor v10 ; bin: 66 44 0f 3a 0a d5 01
; asm: roundss $1, %xmm10, %xmm5
[-,%xmm5] v56 = floor v11 ; bin: 66 41 0f 3a 0a ea 01
; asm: roundss $1, %xmm5, %xmm2
[-,%xmm2] v57 = floor v10 ; bin: 66 0f 3a 0a d5 01
; asm: roundss $2, %xmm5, %xmm10
[-,%xmm10] v58 = ceil v10 ; bin: 66 44 0f 3a 0a d5 02
; asm: roundss $2, %xmm10, %xmm5
[-,%xmm5] v59 = ceil v11 ; bin: 66 41 0f 3a 0a ea 02
; asm: roundss $2, %xmm5, %xmm2
[-,%xmm2] v60 = ceil v10 ; bin: 66 0f 3a 0a d5 02
; asm: roundss $3, %xmm5, %xmm10
[-,%xmm10] v61 = trunc v10 ; bin: 66 44 0f 3a 0a d5 03
; asm: roundss $3, %xmm10, %xmm5
[-,%xmm5] v62 = trunc v11 ; bin: 66 41 0f 3a 0a ea 03
; asm: roundss $3, %xmm5, %xmm2
[-,%xmm2] v63 = trunc v10 ; bin: 66 0f 3a 0a d5 03
; Load/Store
; asm: movd (%r14), %xmm5
@@ -230,6 +258,34 @@ ebb0:
; asm: sqrtsd %xmm10, %xmm5
[-,%xmm5] v51 = sqrt v11 ; bin: f2 41 0f 51 ea
; asm: roundsd $0, %xmm5, %xmm10
[-,%xmm10] v52 = nearest v10 ; bin: 66 44 0f 3a 0b d5 00
; asm: roundsd $0, %xmm10, %xmm5
[-,%xmm5] v53 = nearest v11 ; bin: 66 41 0f 3a 0b ea 00
; asm: roundsd $0, %xmm5, %xmm2
[-,%xmm2] v54 = nearest v10 ; bin: 66 0f 3a 0b d5 00
; asm: roundsd $1, %xmm5, %xmm10
[-,%xmm10] v55 = floor v10 ; bin: 66 44 0f 3a 0b d5 01
; asm: roundsd $1, %xmm10, %xmm5
[-,%xmm5] v56 = floor v11 ; bin: 66 41 0f 3a 0b ea 01
; asm: roundsd $1, %xmm5, %xmm2
[-,%xmm2] v57 = floor v10 ; bin: 66 0f 3a 0b d5 01
; asm: roundsd $2, %xmm5, %xmm10
[-,%xmm10] v58 = ceil v10 ; bin: 66 44 0f 3a 0b d5 02
; asm: roundsd $2, %xmm10, %xmm5
[-,%xmm5] v59 = ceil v11 ; bin: 66 41 0f 3a 0b ea 02
; asm: roundsd $2, %xmm5, %xmm2
[-,%xmm2] v60 = ceil v10 ; bin: 66 0f 3a 0b d5 02
; asm: roundsd $3, %xmm5, %xmm10
[-,%xmm10] v61 = trunc v10 ; bin: 66 44 0f 3a 0b d5 03
; asm: roundsd $3, %xmm10, %xmm5
[-,%xmm5] v62 = trunc v11 ; bin: 66 41 0f 3a 0b ea 03
; asm: roundsd $3, %xmm5, %xmm2
[-,%xmm2] v63 = trunc v10 ; bin: 66 0f 3a 0b d5 03
; Load/Store
; asm: movq (%r14), %xmm5