Remove Constraint

cranelift/codegen/meta/src/cdsl/instructions.rs

@@ -4,7 +4,6 @@ use std::rc::Rc;
 use crate::cdsl::camel_case;
 use crate::cdsl::formats::InstructionFormat;
 use crate::cdsl::operands::Operand;
-use crate::cdsl::type_inference::Constraint;
 use crate::cdsl::typevar::TypeVar;
 
 pub(crate) type AllInstructions = Vec<Instruction>;
@@ -128,7 +127,6 @@ pub(crate) struct InstructionBuilder {
     format: Rc<InstructionFormat>,
     operands_in: Option<Vec<Operand>>,
     operands_out: Option<Vec<Operand>>,
-    constraints: Option<Vec<Constraint>>,
 
     // See Instruction comments for the meaning of these fields.
     is_terminator: bool,
@@ -150,7 +148,6 @@ impl InstructionBuilder {
             format: format.clone(),
             operands_in: None,
             operands_out: None,
-            constraints: None,
 
             is_terminator: false,
             is_branch: false,
@@ -176,12 +173,6 @@ impl InstructionBuilder {
         self
     }
 
-    pub fn constraints(mut self, constraints: Vec<Constraint>) -> Self {
-        assert!(self.constraints.is_none());
-        self.constraints = Some(constraints);
-        self
-    }
-
     #[allow(clippy::wrong_self_convention)]
     pub fn is_terminator(mut self, val: bool) -> Self {
         self.is_terminator = val;

cranelift/codegen/meta/src/cdsl/mod.rs

@@ -8,7 +8,6 @@ pub mod instructions;
 pub mod isa;
 pub mod operands;
 pub mod settings;
-pub mod type_inference;
 pub mod types;
 pub mod typevar;
 

cranelift/codegen/meta/src/cdsl/type_inference.rs

@@ -1,10 +0,0 @@
-use crate::cdsl::typevar::TypeVar;
-
-#[derive(Debug, Hash, PartialEq, Eq)]
-pub(crate) enum Constraint {
-    /// Constraint specifying that a type var tv1 must be wider than or equal to type var tv2 at
-    /// runtime. This requires that:
-    /// 1) They have the same number of lanes
-    /// 2) In a lane tv1 has at least as many bits as tv2.
-    WiderOrEq(TypeVar, TypeVar),
-}