Merge pull request #3332 from afonso360/interp-icmp

cranelift: Add SIMD `icmp` to interpreter
This commit is contained in:
Chris Fallin
2021-09-17 15:13:44 -07:00
committed by GitHub
29 changed files with 1170 additions and 54 deletions

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@@ -1,3 +1,4 @@
test interpret
test run
target aarch64
target x86_64 machinst
@@ -186,7 +187,7 @@ block0(v0: i64,v1: i64,v2: i64,v3: i64):
; Icmp Imm Tests
function %test_icmp_imm_eq_i128() -> b1 {
function %icmp_imm_eq_i128() -> b1 {
block0:
v11 = iconst.i64 0x0
v12 = iconst.i64 0x0
@@ -195,9 +196,9 @@ block0:
return v10
}
; run
; run: %icmp_imm_eq_i128() == true
function %test_icmp_imm_ne_i128() -> b1 {
function %icmp_imm_ne_i128() -> b1 {
block0:
v11 = iconst.i64 0x0
v12 = iconst.i64 0x0
@@ -206,4 +207,4 @@ block0:
return v10
}
; run
; run: %icmp_imm_ne_i128() == true

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@@ -0,0 +1,40 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_eq_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp eq v0, v1
return v2
}
; run: %icmp_eq_i8(0, 0) == true
; run: %icmp_eq_i8(1, 0) == false
; run: %icmp_eq_i8(-1, -1) == true
function %icmp_eq_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp eq v0, v1
return v2
}
; run: %icmp_eq_i16(0, 0) == true
; run: %icmp_eq_i16(1, 0) == false
; run: %icmp_eq_i16(-1, -1) == true
function %icmp_eq_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp eq v0, v1
return v2
}
; run: %icmp_eq_i32(0, 0) == true
; run: %icmp_eq_i32(1, 0) == false
; run: %icmp_eq_i32(-1, -1) == true
function %icmp_eq_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
return v2
}
; run: %icmp_eq_i64(0, 0) == true
; run: %icmp_eq_i64(1, 0) == false
; run: %icmp_eq_i64(-1, -1) == true

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@@ -0,0 +1,40 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_ne_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp ne v0, v1
return v2
}
; run: %icmp_ne_i8(0, 0) == false
; run: %icmp_ne_i8(1, 0) == true
; run: %icmp_ne_i8(-1, -1) == false
function %icmp_ne_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp ne v0, v1
return v2
}
; run: %icmp_ne_i16(0, 0) == false
; run: %icmp_ne_i16(1, 0) == true
; run: %icmp_ne_i16(-1, -1) == false
function %icmp_ne_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp ne v0, v1
return v2
}
; run: %icmp_ne_i32(0, 0) == false
; run: %icmp_ne_i32(1, 0) == true
; run: %icmp_ne_i32(-1, -1) == false
function %icmp_ne_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp ne v0, v1
return v2
}
; run: %icmp_ne_i64(0, 0) == false
; run: %icmp_ne_i64(1, 0) == true
; run: %icmp_ne_i64(-1, -1) == false

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@@ -0,0 +1,75 @@
test interpret
test run
target x86_64 machinst
function %icmp_nof_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp nof v0, v1
return v2
}
; run: %icmp_nof_i8(0, 0) == true
; run: %icmp_nof_i8(0, 1) == true
; run: %icmp_nof_i8(1, 0) == true
; run: %icmp_nof_i8(0, -1) == true
; run: %icmp_nof_i8(0x80, 0x80) == true
; run: %icmp_nof_i8(0x7F, 1) == true
; run: %icmp_nof_i8(0x7F, 0x7F) == true
; run: %icmp_nof_i8(0xFF, 1) == true
; run: %icmp_nof_i8(0x80, 1) == false
; run: %icmp_nof_i8(0x7F, 0x80) == false
; run: %icmp_nof_i8(0x80, 0x7F) == false
; run: %icmp_nof_i8(0x7F, 0xFF) == false
function %icmp_nof_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp nof v0, v1
return v2
}
; run: %icmp_nof_i16(0, 0) == true
; run: %icmp_nof_i16(0, 1) == true
; run: %icmp_nof_i16(1, 0) == true
; run: %icmp_nof_i16(0, -1) == true
; run: %icmp_nof_i16(0x8000, 0x8000) == true
; run: %icmp_nof_i16(0x7FFF, 1) == true
; run: %icmp_nof_i16(0x7FFF, 0x7FFF) == true
; run: %icmp_nof_i16(0xFFFF, 1) == true
; run: %icmp_nof_i16(0x8000, 1) == false
; run: %icmp_nof_i16(0x7FFF, 0x8000) == false
; run: %icmp_nof_i16(0x8000, 0x7FFF) == false
; run: %icmp_nof_i16(0x7FFF, 0xFFFF) == false
function %icmp_nof_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp nof v0, v1
return v2
}
; run: %icmp_nof_i32(0, 0) == true
; run: %icmp_nof_i32(0, 1) == true
; run: %icmp_nof_i32(1, 0) == true
; run: %icmp_nof_i32(0, -1) == true
; run: %icmp_nof_i32(0x80000000, 0x80000000) == true
; run: %icmp_nof_i32(0x7FFFFFFF, 1) == true
; run: %icmp_nof_i32(0x7FFFFFFF, 0x7FFFFFFF) == true
; run: %icmp_nof_i32(0xFFFFFFFF, 1) == true
; run: %icmp_nof_i32(0x80000000, 1) == false
; run: %icmp_nof_i32(0x7FFFFFFF, 0x80000000) == false
; run: %icmp_nof_i32(0x80000000, 0x7FFFFFFF) == false
; run: %icmp_nof_i32(0x7FFFFFFF, 0xFFFFFFFF) == false
function %icmp_nof_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp nof v0, v1
return v2
}
; run: %icmp_nof_i64(0, 0) == true
; run: %icmp_nof_i64(0, 1) == true
; run: %icmp_nof_i64(1, 0) == true
; run: %icmp_nof_i64(0, -1) == true
; run: %icmp_nof_i64(0x80000000_00000000, 0x80000000_00000000) == true
; run: %icmp_nof_i64(0x7FFFFFFF_FFFFFFFF, 1) == true
; run: %icmp_nof_i64(0x7FFFFFFF_FFFFFFFF, 0x7FFFFFFF_FFFFFFFF) == true
; run: %icmp_nof_i64(0xFFFFFFFF_FFFFFFFF, 1) == true
; run: %icmp_nof_i64(0x80000000_00000000, 1) == false
; run: %icmp_nof_i64(0x7FFFFFFF_FFFFFFFF, 0x80000000_00000000) == false
; run: %icmp_nof_i64(0x80000000_00000000, 0x7FFFFFFF_FFFFFFFF) == false
; run: %icmp_nof_i64(0x7FFFFFFF_FFFFFFFF, 0xFFFFFFFF_FFFFFFFF) == false

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@@ -0,0 +1,75 @@
test interpret
test run
target x86_64 machinst
function %icmp_of_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp of v0, v1
return v2
}
; run: %icmp_of_i8(0, 0) == false
; run: %icmp_of_i8(0, 1) == false
; run: %icmp_of_i8(1, 0) == false
; run: %icmp_of_i8(0, -1) == false
; run: %icmp_of_i8(0x80, 0x80) == false
; run: %icmp_of_i8(0x7F, 1) == false
; run: %icmp_of_i8(0x7F, 0x7F) == false
; run: %icmp_of_i8(0xFF, 1) == false
; run: %icmp_of_i8(0x80, 1) == true
; run: %icmp_of_i8(0x7F, 0x80) == true
; run: %icmp_of_i8(0x80, 0x7F) == true
; run: %icmp_of_i8(0x7F, 0xFF) == true
function %icmp_of_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp of v0, v1
return v2
}
; run: %icmp_of_i16(0, 0) == false
; run: %icmp_of_i16(0, 1) == false
; run: %icmp_of_i16(1, 0) == false
; run: %icmp_of_i16(0, -1) == false
; run: %icmp_of_i16(0x8000, 0x8000) == false
; run: %icmp_of_i16(0x7FFF, 1) == false
; run: %icmp_of_i16(0x7FFF, 0x7FFF) == false
; run: %icmp_of_i16(0xFFFF, 1) == false
; run: %icmp_of_i16(0x8000, 1) == true
; run: %icmp_of_i16(0x7FFF, 0x8000) == true
; run: %icmp_of_i16(0x8000, 0x7FFF) == true
; run: %icmp_of_i16(0x7FFF, 0xFFFF) == true
function %icmp_of_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp of v0, v1
return v2
}
; run: %icmp_of_i32(0, 0) == false
; run: %icmp_of_i32(0, 1) == false
; run: %icmp_of_i32(1, 0) == false
; run: %icmp_of_i32(0, -1) == false
; run: %icmp_of_i32(0x80000000, 0x80000000) == false
; run: %icmp_of_i32(0x7FFFFFFF, 1) == false
; run: %icmp_of_i32(0x7FFFFFFF, 0x7FFFFFFF) == false
; run: %icmp_of_i32(0xFFFFFFFF, 1) == false
; run: %icmp_of_i32(0x80000000, 1) == true
; run: %icmp_of_i32(0x7FFFFFFF, 0x80000000) == true
; run: %icmp_of_i32(0x80000000, 0x7FFFFFFF) == true
; run: %icmp_of_i32(0x7FFFFFFF, 0xFFFFFFFF) == true
function %icmp_of_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp of v0, v1
return v2
}
; run: %icmp_of_i64(0, 0) == false
; run: %icmp_of_i64(0, 1) == false
; run: %icmp_of_i64(1, 0) == false
; run: %icmp_of_i64(0, -1) == false
; run: %icmp_of_i64(0x80000000_00000000, 0x80000000_00000000) == false
; run: %icmp_of_i64(0x7FFFFFFF_FFFFFFFF, 1) == false
; run: %icmp_of_i64(0x7FFFFFFF_FFFFFFFF, 0x7FFFFFFF_FFFFFFFF) == false
; run: %icmp_of_i64(0xFFFFFFFF_FFFFFFFF, 1) == false
; run: %icmp_of_i64(0x80000000_00000000, 1) == true
; run: %icmp_of_i64(0x7FFFFFFF_FFFFFFFF, 0x80000000_00000000) == true
; run: %icmp_of_i64(0x80000000_00000000, 0x7FFFFFFF_FFFFFFFF) == true
; run: %icmp_of_i64(0x7FFFFFFF_FFFFFFFF, 0xFFFFFFFF_FFFFFFFF) == true

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@@ -0,0 +1,53 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_sge_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp sge v0, v1
return v2
}
; run: %icmp_sge_i8(0, 0) == true
; run: %icmp_sge_i8(1, 0) == true
; run: %icmp_sge_i8(-1, -1) == true
; run: %icmp_sge_i8(0, 1) == false
; run: %icmp_sge_i8(-5, -1) == false
; run: %icmp_sge_i8(1, -1) == true
function %icmp_sge_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp sge v0, v1
return v2
}
; run: %icmp_sge_i16(0, 0) == true
; run: %icmp_sge_i16(1, 0) == true
; run: %icmp_sge_i16(-1, -1) == true
; run: %icmp_sge_i16(0, 1) == false
; run: %icmp_sge_i16(-5, -1) == false
; run: %icmp_sge_i16(1, -1) == true
function %icmp_sge_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp sge v0, v1
return v2
}
; run: %icmp_sge_i32(0, 0) == true
; run: %icmp_sge_i32(1, 0) == true
; run: %icmp_sge_i32(-1, -1) == true
; run: %icmp_sge_i32(0, 1) == false
; run: %icmp_sge_i32(-5, -1) == false
; run: %icmp_sge_i32(1, -1) == true
function %icmp_sge_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp sge v0, v1
return v2
}
; run: %icmp_sge_i64(0, 0) == true
; run: %icmp_sge_i64(1, 0) == true
; run: %icmp_sge_i64(-1, -1) == true
; run: %icmp_sge_i64(0, 1) == false
; run: %icmp_sge_i64(-5, -1) == false
; run: %icmp_sge_i64(1, -1) == true

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@@ -0,0 +1,53 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_sgt_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp sgt v0, v1
return v2
}
; run: %icmp_sgt_i8(0, 0) == false
; run: %icmp_sgt_i8(1, 0) == true
; run: %icmp_sgt_i8(-1, -1) == false
; run: %icmp_sgt_i8(0, 1) == false
; run: %icmp_sgt_i8(-5, -1) == false
; run: %icmp_sgt_i8(1, -1) == true
function %icmp_sgt_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp sgt v0, v1
return v2
}
; run: %icmp_sgt_i16(0, 0) == false
; run: %icmp_sgt_i16(1, 0) == true
; run: %icmp_sgt_i16(-1, -1) == false
; run: %icmp_sgt_i16(0, 1) == false
; run: %icmp_sgt_i16(-5, -1) == false
; run: %icmp_sgt_i16(1, -1) == true
function %icmp_sgt_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp sgt v0, v1
return v2
}
; run: %icmp_sgt_i32(0, 0) == false
; run: %icmp_sgt_i32(1, 0) == true
; run: %icmp_sgt_i32(-1, -1) == false
; run: %icmp_sgt_i32(0, 1) == false
; run: %icmp_sgt_i32(-5, -1) == false
; run: %icmp_sgt_i32(1, -1) == true
function %icmp_sgt_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp sgt v0, v1
return v2
}
; run: %icmp_sgt_i64(0, 0) == false
; run: %icmp_sgt_i64(1, 0) == true
; run: %icmp_sgt_i64(-1, -1) == false
; run: %icmp_sgt_i64(0, 1) == false
; run: %icmp_sgt_i64(-5, -1) == false
; run: %icmp_sgt_i64(1, -1) == true

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@@ -0,0 +1,53 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_sle_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp sle v0, v1
return v2
}
; run: %icmp_sle_i8(0, 0) == true
; run: %icmp_sle_i8(1, 0) == false
; run: %icmp_sle_i8(-1, -1) == true
; run: %icmp_sle_i8(0, 1) == true
; run: %icmp_sle_i8(-5, -1) == true
; run: %icmp_sle_i8(1, -1) == false
function %icmp_sle_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp sle v0, v1
return v2
}
; run: %icmp_sle_i16(0, 0) == true
; run: %icmp_sle_i16(1, 0) == false
; run: %icmp_sle_i16(-1, -1) == true
; run: %icmp_sle_i16(0, 1) == true
; run: %icmp_sle_i16(-5, -1) == true
; run: %icmp_sle_i16(1, -1) == false
function %icmp_sle_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp sle v0, v1
return v2
}
; run: %icmp_sle_i32(0, 0) == true
; run: %icmp_sle_i32(1, 0) == false
; run: %icmp_sle_i32(-1, -1) == true
; run: %icmp_sle_i32(0, 1) == true
; run: %icmp_sle_i32(-5, -1) == true
; run: %icmp_sle_i32(1, -1) == false
function %icmp_sle_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp sle v0, v1
return v2
}
; run: %icmp_sle_i64(0, 0) == true
; run: %icmp_sle_i64(1, 0) == false
; run: %icmp_sle_i64(-1, -1) == true
; run: %icmp_sle_i64(0, 1) == true
; run: %icmp_sle_i64(-5, -1) == true
; run: %icmp_sle_i64(1, -1) == false

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@@ -0,0 +1,52 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_slt_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp slt v0, v1
return v2
}
; run: %icmp_slt_i8(0, 0) == false
; run: %icmp_slt_i8(1, 0) == false
; run: %icmp_slt_i8(-1, -1) == false
; run: %icmp_slt_i8(0, 1) == true
; run: %icmp_slt_i8(-5, -1) == true
; run: %icmp_slt_i8(1, -1) == false
function %icmp_slt_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp slt v0, v1
return v2
}
; run: %icmp_slt_i16(0, 0) == false
; run: %icmp_slt_i16(1, 0) == false
; run: %icmp_slt_i16(-1, -1) == false
; run: %icmp_slt_i16(0, 1) == true
; run: %icmp_slt_i16(-5, -1) == true
; run: %icmp_slt_i16(1, -1) == false
function %icmp_slt_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp slt v0, v1
return v2
}
; run: %icmp_slt_i32(0, 0) == false
; run: %icmp_slt_i32(1, 0) == false
; run: %icmp_slt_i32(-1, -1) == false
; run: %icmp_slt_i32(0, 1) == true
; run: %icmp_slt_i32(-5, -1) == true
; run: %icmp_slt_i32(1, -1) == false
function %icmp_slt_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp slt v0, v1
return v2
}
; run: %icmp_slt_i64(0, 0) == false
; run: %icmp_slt_i64(1, 0) == false
; run: %icmp_slt_i64(-1, -1) == false
; run: %icmp_slt_i64(0, 1) == true
; run: %icmp_slt_i64(-5, -1) == true
; run: %icmp_slt_i64(1, -1) == false

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@@ -0,0 +1,52 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_uge_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp uge v0, v1
return v2
}
; run: %icmp_uge_i8(0, 0) == true
; run: %icmp_uge_i8(1, 0) == true
; run: %icmp_uge_i8(-1, -1) == true
; run: %icmp_uge_i8(0, 1) == false
; run: %icmp_uge_i8(-5, -1) == false
; run: %icmp_uge_i8(1, -1) == false
function %icmp_uge_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp uge v0, v1
return v2
}
; run: %icmp_uge_i16(0, 0) == true
; run: %icmp_uge_i16(1, 0) == true
; run: %icmp_uge_i16(-1, -1) == true
; run: %icmp_uge_i16(0, 1) == false
; run: %icmp_uge_i16(-5, -1) == false
; run: %icmp_uge_i16(1, -1) == false
function %icmp_uge_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp uge v0, v1
return v2
}
; run: %icmp_uge_i32(0, 0) == true
; run: %icmp_uge_i32(1, 0) == true
; run: %icmp_uge_i32(-1, -1) == true
; run: %icmp_uge_i32(0, 1) == false
; run: %icmp_uge_i32(-5, -1) == false
; run: %icmp_uge_i32(1, -1) == false
function %icmp_uge_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp uge v0, v1
return v2
}
; run: %icmp_uge_i64(0, 0) == true
; run: %icmp_uge_i64(1, 0) == true
; run: %icmp_uge_i64(-1, -1) == true
; run: %icmp_uge_i64(0, 1) == false
; run: %icmp_uge_i64(-5, -1) == false
; run: %icmp_uge_i64(1, -1) == false

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@@ -0,0 +1,52 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_ugt_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp ugt v0, v1
return v2
}
; run: %icmp_ugt_i8(0, 0) == false
; run: %icmp_ugt_i8(1, 0) == true
; run: %icmp_ugt_i8(-1, -1) == false
; run: %icmp_ugt_i8(0, 1) == false
; run: %icmp_ugt_i8(-5, -1) == false
; run: %icmp_ugt_i8(1, -1) == false
function %icmp_ugt_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp ugt v0, v1
return v2
}
; run: %icmp_ugt_i16(0, 0) == false
; run: %icmp_ugt_i16(1, 0) == true
; run: %icmp_ugt_i16(-1, -1) == false
; run: %icmp_ugt_i16(0, 1) == false
; run: %icmp_ugt_i16(-5, -1) == false
; run: %icmp_ugt_i16(1, -1) == false
function %icmp_ugt_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp ugt v0, v1
return v2
}
; run: %icmp_ugt_i32(0, 0) == false
; run: %icmp_ugt_i32(1, 0) == true
; run: %icmp_ugt_i32(-1, -1) == false
; run: %icmp_ugt_i32(0, 1) == false
; run: %icmp_ugt_i32(-5, -1) == false
; run: %icmp_ugt_i32(1, -1) == false
function %icmp_ugt_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp ugt v0, v1
return v2
}
; run: %icmp_ugt_i64(0, 0) == false
; run: %icmp_ugt_i64(1, 0) == true
; run: %icmp_ugt_i64(-1, -1) == false
; run: %icmp_ugt_i64(0, 1) == false
; run: %icmp_ugt_i64(-5, -1) == false
; run: %icmp_ugt_i64(1, -1) == false

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@@ -0,0 +1,52 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_ule_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp ule v0, v1
return v2
}
; run: %icmp_ule_i8(0, 0) == true
; run: %icmp_ule_i8(1, 0) == false
; run: %icmp_ule_i8(-1, -1) == true
; run: %icmp_ule_i8(0, 1) == true
; run: %icmp_ule_i8(-5, -1) == true
; run: %icmp_ule_i8(1, -1) == true
function %icmp_ule_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp ule v0, v1
return v2
}
; run: %icmp_ule_i16(0, 0) == true
; run: %icmp_ule_i16(1, 0) == false
; run: %icmp_ule_i16(-1, -1) == true
; run: %icmp_ule_i16(0, 1) == true
; run: %icmp_ule_i16(-5, -1) == true
; run: %icmp_ule_i16(1, -1) == true
function %icmp_ule_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp ule v0, v1
return v2
}
; run: %icmp_ule_i32(0, 0) == true
; run: %icmp_ule_i32(1, 0) == false
; run: %icmp_ule_i32(-1, -1) == true
; run: %icmp_ule_i32(0, 1) == true
; run: %icmp_ule_i32(-5, -1) == true
; run: %icmp_ule_i32(1, -1) == true
function %icmp_ule_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp ule v0, v1
return v2
}
; run: %icmp_ule_i64(0, 0) == true
; run: %icmp_ule_i64(1, 0) == false
; run: %icmp_ule_i64(-1, -1) == true
; run: %icmp_ule_i64(0, 1) == true
; run: %icmp_ule_i64(-5, -1) == true
; run: %icmp_ule_i64(1, -1) == true

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@@ -0,0 +1,52 @@
test interpret
test run
target aarch64
target x86_64 machinst
function %icmp_ult_i8(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = icmp ult v0, v1
return v2
}
; run: %icmp_ult_i8(0, 0) == false
; run: %icmp_ult_i8(1, 0) == false
; run: %icmp_ult_i8(-1, -1) == false
; run: %icmp_ult_i8(0, 1) == true
; run: %icmp_ult_i8(-5, -1) == true
; run: %icmp_ult_i8(1, -1) == true
function %icmp_ult_i16(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = icmp ult v0, v1
return v2
}
; run: %icmp_ult_i16(0, 0) == false
; run: %icmp_ult_i16(1, 0) == false
; run: %icmp_ult_i16(-1, -1) == false
; run: %icmp_ult_i16(0, 1) == true
; run: %icmp_ult_i16(-5, -1) == true
; run: %icmp_ult_i16(1, -1) == true
function %icmp_ult_i32(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = icmp ult v0, v1
return v2
}
; run: %icmp_ult_i32(0, 0) == false
; run: %icmp_ult_i32(1, 0) == false
; run: %icmp_ult_i32(-1, -1) == false
; run: %icmp_ult_i32(0, 1) == true
; run: %icmp_ult_i32(-5, -1) == true
; run: %icmp_ult_i32(1, -1) == true
function %icmp_ult_i64(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = icmp ult v0, v1
return v2
}
; run: %icmp_ult_i64(0, 0) == false
; run: %icmp_ult_i64(1, 0) == false
; run: %icmp_ult_i64(-1, -1) == false
; run: %icmp_ult_i64(0, 1) == true
; run: %icmp_ult_i64(-5, -1) == true
; run: %icmp_ult_i64(1, -1) == true

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@@ -1,3 +1,4 @@
test interpret
test run
target aarch64
target s390x
@@ -13,5 +14,5 @@ block0(v0: i8):
v2 = icmp sge v0, v1
return v2
}
; run: %test(49) == true
; run: %test(-65) == false
; run: %overflow_rhs_con(49) == true
; run: %overflow_rhs_con(-65) == false

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@@ -0,0 +1,30 @@
test interpret
function %simd_icmp_eq_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp eq v0, v1
return v2
}
; run: %simd_icmp_eq_i8([1 0 -1 1 1 1 1 1 1 1 1 1 1 1 1 1], [1 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0]) == [true true true false false false false false false false false false false false false false]
function %simd_icmp_eq_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp eq v0, v1
return v2
}
; run: %simd_icmp_eq_i16([1 0 -1 1 1 1 1 1], [1 0 -1 0 0 0 0 0]) == [true true true false false false false false]
function %simd_icmp_eq_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp eq v0, v1
return v2
}
; run: %simd_icmp_eq_i32([1 0 -1 1], [1 0 -1 0]) == [true true true false]
function %simd_icmp_eq_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp eq v0, v1
return v2
}
; run: %simd_icmp_eq_i64([10 0], [1 0]) == [false true]
; run: %simd_icmp_eq_i64([-1 1], [-1 0]) == [true false]

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@@ -0,0 +1,30 @@
test interpret
function %simd_icmp_ne_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp ne v0, v1
return v2
}
; run: %simd_icmp_ne_i8([1 0 -1 1 1 1 1 1 1 1 1 1 1 1 1 1], [1 0 -1 0 0 0 0 0 0 0 0 0 0 0 0 0]) == [false false false true true true true true true true true true true true true true]
function %simd_icmp_ne_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp ne v0, v1
return v2
}
; run: %simd_icmp_ne_i16([1 0 -1 1 1 1 1 1], [1 0 -1 0 0 0 0 0]) == [false false false true true true true true]
function %simd_icmp_ne_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp ne v0, v1
return v2
}
; run: %simd_icmp_ne_i32([1 0 -1 1], [1 0 -1 0]) == [false false false true]
function %simd_icmp_ne_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp ne v0, v1
return v2
}
; run: %simd_icmp_ne_i64([10 0], [1 0]) == [true false]
; run: %simd_icmp_ne_i64([-1 1], [-1 0]) == [false true]

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@@ -0,0 +1,45 @@
test interpret
function %simd_icmp_nof_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp nof v0, v1
return v2
}
; run: %simd_icmp_nof_i8([0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0], [0 1 0 0xFF 0 0 0 0 0 0 0 0 0 0 0 0]) == [true true true true true true true true true true true true true true true true]
; run: %simd_icmp_nof_i8([0x80 0x7F 0x7F 0xFF 0 0 0 0 0 0 0 0 0 0 0 0], [0x80 0x01 0x7F 0x01 0 0 0 0 0 0 0 0 0 0 0 0]) == [true true true true true true true true true true true true true true true true]
; run: %simd_icmp_nof_i8([0x80 0x7F 0x80 0x7F 0 0 0 0 0 0 0 0 0 0 0 0], [0x01 0x80 0x7F 0xFF 0 0 0 0 0 0 0 0 0 0 0 0]) == [false false false false true true true true true true true true true true true true]
; run: %simd_icmp_nof_i8([0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F], [0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF]) == [false false false false false false false false false false false false false false false false]
function %simd_icmp_nof_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp nof v0, v1
return v2
}
; run: %simd_icmp_nof_i1([0 0 1 0 0 0 0 0], [0 1 0 0xFFFF 0 0 0 0]) == [true true true true true true true true]
; run: %simd_icmp_nof_i1([0x8000 0x7FFF 0x7FFF 0xFFFF 0 0 0 0], [0x8000 0x0001 0x7FFF 0x0001 0 0 0 0]) == [true true true true true true true true]
; run: %simd_icmp_nof_i1([0x8000 0x7FFF 0x8000 0x7FFF 0 0 0 0], [0x0001 0x8000 0x7FFF 0xFFFF 0 0 0 0]) == [false false false false true true true true]
; run: %simd_icmp_nof_i1([0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF], [0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF]) == [false false false false false false false false]
function %simd_icmp_nof_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp nof v0, v1
return v2
}
; run: %simd_icmp_nof_i3([0 0 1 0], [0 1 0 0xFFFFFFFF]) == [true true true true]
; run: %simd_icmp_nof_i3([0x80000000 0x7FFFFFFF 0x7FFFFFFF 0xFFFFFFFF], [0x80000000 0x00000001 0x7FFFFFFF 0x00000001]) == [true true true true]
; run: %simd_icmp_nof_i3([0x80000000 0x7FFFFFFF 0x80000000 0x7FFFFFFF], [0x00000001 0x80000000 0x7FFFFFFF 0xFFFFFFFF]) == [false false false false]
; run: %simd_icmp_nof_i3([0x7FFFFFFF 0x7FFFFFFF 0x7FFFFFFF 0x7FFFFFFF], [0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF]) == [false false false false]
function %simd_icmp_nof_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp nof v0, v1
return v2
}
; run: %simd_icmp_nof_i6([0 0], [0 1]) == [true true]
; run: %simd_icmp_nof_i6([1 0], [0 0xFFFFFFFF_FFFFFFFF]) == [true true]
; run: %simd_icmp_nof_i6([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x80000000_00000000 0x00000000_00000001]) == [true true]
; run: %simd_icmp_nof_i6([0x7FFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF], [0x7FFFFFFF_FFFFFFFF 0x00000000_00000001]) == [true true]
; run: %simd_icmp_nof_i6([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x01 0x80000000_00000000]) == [false false]
; run: %simd_icmp_nof_i6([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x7FFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF]) == [false false]

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@@ -0,0 +1,45 @@
test interpret
function %simd_icmp_of_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp of v0, v1
return v2
}
; run: %simd_icmp_of_i8([0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0], [0 1 0 0xFF 0 0 0 0 0 0 0 0 0 0 0 0]) == [false false false false false false false false false false false false false false false false]
; run: %simd_icmp_of_i8([0x80 0x7F 0x7F 0xFF 0 0 0 0 0 0 0 0 0 0 0 0], [0x80 0x01 0x7F 0x01 0 0 0 0 0 0 0 0 0 0 0 0]) == [false false false false false false false false false false false false false false false false]
; run: %simd_icmp_of_i8([0x80 0x7F 0x80 0x7F 0 0 0 0 0 0 0 0 0 0 0 0], [0x01 0x80 0x7F 0xFF 0 0 0 0 0 0 0 0 0 0 0 0]) == [true true true true false false false false false false false false false false false false]
; run: %simd_icmp_of_i8([0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F], [0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF]) == [true true true true true true true true true true true true true true true true]
function %simd_icmp_of_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp of v0, v1
return v2
}
; run: %simd_icmp_of_i16([0 0 1 0 0 0 0 0], [0 1 0 0xFFFF 0 0 0 0]) == [false false false false false false false false]
; run: %simd_icmp_of_i16([0x8000 0x7FFF 0x7FFF 0xFFFF 0 0 0 0], [0x8000 0x0001 0x7FFF 0x0001 0 0 0 0]) == [false false false false false false false false]
; run: %simd_icmp_of_i16([0x8000 0x7FFF 0x8000 0x7FFF 0 0 0 0], [0x0001 0x8000 0x7FFF 0xFFFF 0 0 0 0]) == [true true true true false false false false]
; run: %simd_icmp_of_i16([0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF 0x7FFF], [0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF]) == [true true true true true true true true]
function %simd_icmp_of_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp of v0, v1
return v2
}
; run: %simd_icmp_of_i32([0 0 1 0], [0 1 0 0xFFFFFFFF]) == [false false false false]
; run: %simd_icmp_of_i32([0x80000000 0x7FFFFFFF 0x7FFFFFFF 0xFFFFFFFF], [0x80000000 0x00000001 0x7FFFFFFF 0x00000001]) == [false false false false]
; run: %simd_icmp_of_i32([0x80000000 0x7FFFFFFF 0x80000000 0x7FFFFFFF], [0x00000001 0x80000000 0x7FFFFFFF 0xFFFFFFFF]) == [true true true true]
; run: %simd_icmp_of_i32([0x7FFFFFFF 0x7FFFFFFF 0x7FFFFFFF 0x7FFFFFFF], [0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF]) == [true true true true]
function %simd_icmp_of_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp of v0, v1
return v2
}
; run: %simd_icmp_of_i64([0 0], [0 1]) == [false false]
; run: %simd_icmp_of_i64([1 0], [0 0xFFFFFFFF_FFFFFFFF]) == [false false]
; run: %simd_icmp_of_i64([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x80000000_00000000 0x00000000_00000001]) == [false false]
; run: %simd_icmp_of_i64([0x7FFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF], [0x7FFFFFFF_FFFFFFFF 0x00000000_00000001]) == [false false]
; run: %simd_icmp_of_i64([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x01 0x80000000_00000000]) == [true true]
; run: %simd_icmp_of_i64([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], [0x7FFFFFFF_FFFFFFFF 0xFFFFFFFF_FFFFFFFF]) == [true true]

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@@ -0,0 +1,33 @@
test interpret
function %simd_icmp_sge_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp sge v0, v1
return v2
}
; run: %simd_icmp_sge_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 1 0 0 0 0 0 0 0 0 0 0]) == [true true true false false true true true true true true true true true true true]
function %simd_icmp_sge_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp sge v0, v1
return v2
}
; run: %simd_icmp_sge_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 1 0 0]) == [true true true false false true true true]
function %simd_icmp_sge_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp sge v0, v1
return v2
}
; run: %simd_icmp_sge_i3([0 1 -1 0], [0 0 -1 1]) == [true true true false]
; run: %simd_icmp_sge_i3([-5 1 0 0], [-1 1 0 0]) == [false true true true]
function %simd_icmp_sge_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp sge v0, v1
return v2
}
; run: %simd_icmp_sge_i6([0 1], [0 0]) == [true true]
; run: %simd_icmp_sge_i6([-1 0], [-1 1]) == [true false]
; run: %simd_icmp_sge_i6([-5 1], [-1 1]) == [false true]
; run: %simd_icmp_sge_i6([0 0], [0 0]) == [true true]

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@@ -0,0 +1,35 @@
test interpret
function %simd_icmp_sgt_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp sgt v0, v1
return v2
}
; run: %simd_icmp_sgt_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [false true false false false true false false false false false false false false false false]
function %simd_icmp_sgt_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp sgt v0, v1
return v2
}
; run: %simd_icmp_sgt_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [false true false false false true false false]
function %simd_icmp_sgt_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp sgt v0, v1
return v2
}
; run: %simd_icmp_sgt_i3([0 1 -1 0], [0 0 -1 1]) == [false true false false]
; run: %simd_icmp_sgt_i3([-5 1 0 0], [-1 -1 0 0]) == [false true false false]
function %simd_icmp_sgt_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp sgt v0, v1
return v2
}
; run: %simd_icmp_sgt_i6([0 1], [0 0 ]) == [false true]
; run: %simd_icmp_sgt_i6([-1 0], [-1 1]) == [false false]
; run: %simd_icmp_sgt_i6([-5 1], [-1 -1]) == [false true]
; run: %simd_icmp_sgt_i6([0 0], [0 0]) == [false false]

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@@ -0,0 +1,35 @@
test interpret
function %simd_icmp_sle_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp sle v0, v1
return v2
}
; run: %simd_icmp_sle_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [true false true true true false true true true true true true true true true true]
function %simd_icmp_sle_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp sle v0, v1
return v2
}
; run: %simd_icmp_sle_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [true false true true true false true true]
function %simd_icmp_sle_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp sle v0, v1
return v2
}
; run: %simd_icmp_sle_i3([0 1 -1 0], [0 0 -1 1]) == [true false true true]
; run: %simd_icmp_sle_i3([-5 1 0 0], [-1 -1 0 0]) == [true false true true]
function %simd_icmp_sle_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp sle v0, v1
return v2
}
; run: %simd_icmp_sle_i6([0 1], [0 0 ]) == [true false]
; run: %simd_icmp_sle_i6([-1 0], [-1 1]) == [true true]
; run: %simd_icmp_sle_i6([-5 1], [-1 -1]) == [true false]
; run: %simd_icmp_sle_i6([0 0], [0 0]) == [true true]

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test interpret
function %simd_icmp_slt_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp slt v0, v1
return v2
}
; run: %simd_icmp_slt_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 1 0 0 0 0 0 0 0 0 0 0]) == [false false false true true false false false false false false false false false false false]
function %simd_icmp_slt_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp slt v0, v1
return v2
}
; run: %simd_icmp_slt_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 1 0 0]) == [false false false true true false false false]
function %simd_icmp_slt_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp slt v0, v1
return v2
}
; run: %simd_icmp_slt_i3([0 1 -1 0], [0 0 -1 1]) == [false false false true]
; run: %simd_icmp_slt_i3([-5 1 0 0], [-1 1 0 0]) == [true false false false]
function %simd_icmp_slt_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp slt v0, v1
return v2
}
; run: %simd_icmp_slt_i6([0 1], [0 0]) == [false false]
; run: %simd_icmp_slt_i6([-1 0], [-1 1]) == [false true]
; run: %simd_icmp_slt_i6([-5 1], [-1 1]) == [true false]
; run: %simd_icmp_slt_i6([0 0], [0 0]) == [false false]

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test interpret
function %simd_icmp_uge_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp uge v0, v1
return v2
}
; run: %simd_icmp_uge_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [true true true false false false true true true true true true true true true true]
function %simd_icmp_uge_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp uge v0, v1
return v2
}
; run: %simd_icmp_uge_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [true true true false false false true true]
function %simd_icmp_uge_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp uge v0, v1
return v2
}
; run: %simd_icmp_uge_i3([0 1 -1 0], [0 0 -1 1]) == [true true true false]
; run: %simd_icmp_uge_i3([-5 1 0 0], [-1 -1 0 0]) == [false false true true]
function %simd_icmp_uge_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp uge v0, v1
return v2
}
; run: %simd_icmp_uge_i6([0 1], [0 0]) == [true true]
; run: %simd_icmp_uge_i6([-1 0], [-1 1]) == [true false]
; run: %simd_icmp_uge_i6([-5 1], [-1 -1]) == [false false]
; run: %simd_icmp_uge_i6([0 0], [0 0]) == [true true]

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test interpret
function %simd_icmp_ugt_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp ugt v0, v1
return v2
}
; run: %simd_icmp_ugt_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [false true false false false false false false false false false false false false false false]
function %simd_icmp_ugt_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp ugt v0, v1
return v2
}
; run: %simd_icmp_ugt_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [false true false false false false false false]
function %simd_icmp_ugt_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp ugt v0, v1
return v2
}
; run: %simd_icmp_ugt_i3([0 1 -1 0], [0 0 -1 1]) == [false true false false]
; run: %simd_icmp_ugt_i3([-5 1 0 0], [-1 -1 0 0]) == [false false false false]
function %simd_icmp_ugt_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp ugt v0, v1
return v2
}
; run: %simd_icmp_ugt_i6([0 1], [0 0]) == [false true]
; run: %simd_icmp_ugt_i6([-1 0], [-1 1]) == [false false]
; run: %simd_icmp_ugt_i6([-5 1], [-1 -1]) == [false false]
; run: %simd_icmp_ugt_i6([0 0], [0 0]) == [false false]

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test interpret
function %simd_icmp_ule_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp ule v0, v1
return v2
}
; run: %simd_icmp_ule_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [true false true true true true true true true true true true true true true true]
function %simd_icmp_ule_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp ule v0, v1
return v2
}
; run: %simd_icmp_ule_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [true false true true true true true true]
function %simd_icmp_ule_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp ule v0, v1
return v2
}
; run: %simd_icmp_ule_i3([0 1 -1 0], [0 0 -1 1]) == [true false true true]
; run: %simd_icmp_ule_i3([-5 1 0 0], [-1 -1 0 0]) == [true true true true]
function %simd_icmp_ule_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp ule v0, v1
return v2
}
; run: %simd_icmp_ule_i6([0 1], [0 0]) == [true false]
; run: %simd_icmp_ule_i6([-1 0], [-1 1]) == [true true]
; run: %simd_icmp_ule_i6([-5 1], [-1 -1]) == [true true]
; run: %simd_icmp_ule_i6([0 0], [0 0]) == [true true]

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test interpret
function %simd_icmp_ult_i8(i8x16, i8x16) -> b8x16 {
block0(v0: i8x16, v1: i8x16):
v2 = icmp ult v0, v1
return v2
}
; run: %simd_icmp_ult_i8([0 1 -1 0 -5 1 0 0 0 0 0 0 0 0 0 0], [0 0 -1 1 -1 -1 0 0 0 0 0 0 0 0 0 0]) == [false false false true true true false false false false false false false false false false]
function %simd_icmp_ult_i16(i16x8, i16x8) -> b16x8 {
block0(v0: i16x8, v1: i16x8):
v2 = icmp ult v0, v1
return v2
}
; run: %simd_icmp_ult_i1([0 1 -1 0 -5 1 0 0], [0 0 -1 1 -1 -1 0 0]) == [false false false true true true false false]
function %simd_icmp_ult_i32(i32x4, i32x4) -> b32x4 {
block0(v0: i32x4, v1: i32x4):
v2 = icmp ult v0, v1
return v2
}
; run: %simd_icmp_ult_i3([0 1 -1 0], [0 0 -1 1]) == [false false false true]
; run: %simd_icmp_ult_i3([-5 1 0 0], [-1 -1 0 0]) == [true true false false]
function %simd_icmp_ult_i64(i64x2, i64x2) -> b64x2 {
block0(v0: i64x2, v1: i64x2):
v2 = icmp ult v0, v1
return v2
}
; run: %simd_icmp_ult_i6([0 1], [0 0]) == [false false]
; run: %simd_icmp_ult_i6([-1 0], [-1 1]) == [false true]
; run: %simd_icmp_ult_i6([-5 1], [-1 -1]) == [true true]
; run: %simd_icmp_ult_i6([0 0], [0 0]) == [false false]