[meta-python] Use named predicates for x86 encodings instead of anonymous predicates;

And generate those in a deterministic order that the Rust crate can
reproduce easily.
This commit is contained in:
Benjamin Bouvier
2019-04-15 16:51:15 +02:00
parent 5cd0724fef
commit 6a25354520
3 changed files with 27 additions and 11 deletions

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@@ -229,16 +229,25 @@ class SettingGroup(object):
.format(self, SettingGroup._current))
SettingGroup._current = None
if globs:
# Ensure that named predicates are ordered in a deterministic way
# that the Rust crate may simply reproduce, by pushing entries into
# a vector that we'll sort by name later.
named_predicates = []
for name, obj in globs.items():
if isinstance(obj, Setting):
assert obj.name is None, obj.name
obj.name = name
if isinstance(obj, Predicate):
self.named_predicates[name] = obj
named_predicates.append((name, obj))
if isinstance(obj, Preset):
assert obj.name is None, obj.name
obj.name = name
named_predicates.sort(key=lambda x: x[0])
for (name, obj) in named_predicates:
self.named_predicates[name] = obj
self.layout()
@staticmethod

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@@ -3,7 +3,7 @@ x86 Encodings.
"""
from __future__ import absolute_import
from cdsl.predicates import IsZero32BitFloat, IsZero64BitFloat
from cdsl.predicates import IsUnsignedInt, Not, And
from cdsl.predicates import IsUnsignedInt
from base.predicates import IsColocatedFunc, IsColocatedData, LengthEquals
from base import instructions as base
from base import types
@@ -15,8 +15,8 @@ from . import settings as cfg
from . import instructions as x86
from .legalize import x86_expand
from base.legalize import narrow, widen, expand_flags
from base.settings import allones_funcaddrs, is_pic
from .settings import use_sse41
from .settings import use_sse41, not_all_ones_funcaddrs_and_not_is_pic, \
all_ones_funcaddrs_and_not_is_pic, is_pic, not_is_pic
try:
from typing import TYPE_CHECKING, Any # noqa
@@ -407,15 +407,15 @@ enc_both(base.regspill.f64, r.fregspill32, 0xf2, 0x0f, 0x11)
# Non-PIC, all-ones funcaddresses.
X86_32.enc(base.func_addr.i32, *r.fnaddr4(0xb8),
isap=And(Not(allones_funcaddrs), Not(is_pic)))
isap=not_all_ones_funcaddrs_and_not_is_pic)
X86_64.enc(base.func_addr.i64, *r.fnaddr8.rex(0xb8, w=1),
isap=And(Not(allones_funcaddrs), Not(is_pic)))
isap=not_all_ones_funcaddrs_and_not_is_pic)
# Non-PIC, all-zeros funcaddresses.
X86_32.enc(base.func_addr.i32, *r.allones_fnaddr4(0xb8),
isap=And(allones_funcaddrs, Not(is_pic)))
isap=all_ones_funcaddrs_and_not_is_pic)
X86_64.enc(base.func_addr.i64, *r.allones_fnaddr8.rex(0xb8, w=1),
isap=And(allones_funcaddrs, Not(is_pic)))
isap=all_ones_funcaddrs_and_not_is_pic)
# 64-bit, colocated, both PIC and non-PIC. Use the lea instruction's
# pc-relative field.
@@ -432,9 +432,9 @@ X86_64.enc(base.func_addr.i64, *r.got_fnaddr8.rex(0x8b, w=1),
# Non-PIC
X86_32.enc(base.symbol_value.i32, *r.gvaddr4(0xb8),
isap=Not(is_pic))
isap=not_is_pic)
X86_64.enc(base.symbol_value.i64, *r.gvaddr8.rex(0xb8, w=1),
isap=Not(is_pic))
isap=not_is_pic)
# PIC, colocated
X86_64.enc(base.symbol_value.i64, *r.pcrel_gvaddr8.rex(0x8d, w=1),

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@@ -3,7 +3,7 @@ x86 settings.
"""
from __future__ import absolute_import
from cdsl.settings import SettingGroup, BoolSetting, Preset
from cdsl.predicates import And
from cdsl.predicates import And, Not
import base.settings as shared
from .defs import ISA
@@ -35,6 +35,13 @@ use_popcnt = And(has_popcnt, has_sse42)
use_bmi1 = And(has_bmi1)
use_lzcnt = And(has_lzcnt)
is_pic = And(shared.is_pic)
not_is_pic = Not(shared.is_pic)
all_ones_funcaddrs_and_not_is_pic = And(shared.allones_funcaddrs,
Not(shared.is_pic))
not_all_ones_funcaddrs_and_not_is_pic = And(Not(shared.allones_funcaddrs),
Not(shared.is_pic))
# Presets corresponding to x86 CPUs.
baseline = Preset()