Fixes #1619: Properly bubble up errors when seeing an unexpected type during lowering.
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@@ -7,7 +7,7 @@ use crate::binemit::CodeOffset;
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use crate::ir::types::{B1, B16, B32, B64, B8, F32, F64, FFLAGS, I16, I32, I64, I8, IFLAGS};
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use crate::ir::{ExternalName, Opcode, SourceLoc, TrapCode, Type};
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use crate::machinst::*;
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use crate::settings;
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use crate::{settings, CodegenError, CodegenResult};
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use regalloc::Map as RegallocMap;
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use regalloc::{RealReg, RealRegUniverse, Reg, RegClass, SpillSlot, VirtualReg, Writable};
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@@ -1787,12 +1787,15 @@ impl MachInst for Inst {
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None
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}
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fn rc_for_type(ty: Type) -> RegClass {
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fn rc_for_type(ty: Type) -> CodegenResult<RegClass> {
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match ty {
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I8 | I16 | I32 | I64 | B1 | B8 | B16 | B32 | B64 => RegClass::I64,
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F32 | F64 => RegClass::V128,
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IFLAGS | FFLAGS => RegClass::I64,
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_ => panic!("Unexpected SSA-value type: {}", ty),
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I8 | I16 | I32 | I64 | B1 | B8 | B16 | B32 | B64 => Ok(RegClass::I64),
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F32 | F64 => Ok(RegClass::V128),
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IFLAGS | FFLAGS => Ok(RegClass::I64),
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_ => Err(CodegenError::Unsupported(format!(
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"Unexpected SSA-value type: {}",
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ty
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))),
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}
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}
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@@ -34,7 +34,11 @@ impl AArch64Backend {
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/// This performs lowering to VCode, register-allocates the code, computes block layout and
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/// finalizes branches. The result is ready for binary emission.
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fn compile_vcode(&self, func: &Function, flags: settings::Flags) -> VCode<inst::Inst> {
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fn compile_vcode(
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&self,
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func: &Function,
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flags: settings::Flags,
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) -> CodegenResult<VCode<inst::Inst>> {
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let abi = Box::new(abi::AArch64ABIBody::new(func, flags));
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compile::compile::<AArch64Backend>(func, self, abi)
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}
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@@ -47,7 +51,7 @@ impl MachBackend for AArch64Backend {
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want_disasm: bool,
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) -> CodegenResult<MachCompileResult> {
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let flags = self.flags();
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let vcode = self.compile_vcode(func, flags.clone());
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let vcode = self.compile_vcode(func, flags.clone())?;
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let sections = vcode.emit();
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let frame_size = vcode.frame_size();
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