cranelift: Port trap and resumable_trap lowering to ISLE on x64

cranelift/codegen/src/machinst/isle.rs

@@ -48,6 +48,11 @@ macro_rules! isle_prelude_methods {
             ValueRegs::two(r1, r2)
         }
 
+        #[inline]
+        fn value_regs_invalid(&mut self) -> ValueRegs {
+            ValueRegs::invalid()
+        }
+
         #[inline]
         fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {
             let value_regs = self.lower_ctx.alloc_tmp(ty);