Add return_reg encodings for RISC-V.

2017-02-21 15:17:33 -08:00
parent a7d24ab1dc
commit 62334b26b4
5 changed files with 33 additions and 8 deletions
--- a/lib/cretonne/src/write.rs
+++ b/lib/cretonne/src/write.rs
@@ -241,9 +241,9 @@ fn write_instruction(w: &mut Write,
        }
        ReturnReg { ref data, .. } => {
            if data.varargs.is_empty() {
-                writeln!(w, "{}", data.arg)
+                writeln!(w, " {}", data.arg)
            } else {
-                writeln!(w, "{}, {}", data.arg, data.varargs)
+                writeln!(w, " {}, {}", data.arg, data.varargs)
            }
        }
    }